Simultaneous multithreading (SMT) is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading. SMT permits multiple independent threads of execution to better use the resources provided by modern processor architectures.
The term multithreading is ambiguous, because not only can multiple threads be executed simultaneously on one CPU core, but also multiple tasks (with different page tables, different task state segments, different protection rings, different I/O permissions, etc.). Although running on the same core, they are completely separated from each other.
Multithreading is similar in concept to preemptive multitasking but is implemented at the thread level of execution in modern superscalar processors.
Simultaneous multithreading (SMT) is one of the two main implementations of multithreading, the other form being temporal multithreading (also known as super-threading). In temporal multithreading, only one thread of instructions can execute in any given pipeline stage at a time. In simultaneous multithreading, instructions from more than one thread can be executed in any given pipeline stage at a time. This is done without great changes to the basic processor architecture: the main additions needed are the ability to fetch instructions from multiple threads in a cycle, and a larger register file to hold data from multiple threads. The number of concurrent threads is decided by the chip designers. Two concurrent threads per CPU core are common, but some processors support up to eight concurrent threads per core.
Because it inevitably increases conflict on shared resources, measuring or agreeing on its effectiveness can be difficult. However, measured energy efficiency of SMT with parallel native and managed workloads on historical 130 nm to 32 nm Intel SMT (hyper-threading) implementations found that in 45 nm and 32 nm implementations, SMT is extremely energy efficient, even with in-order Atom processors. In modern systems, SMT effectively exploits concurrency with very little additional dynamic power.
Cette page est générée automatiquement et peut contenir des informations qui ne sont pas correctes, complètes, à jour ou pertinentes par rapport à votre recherche. Il en va de même pour toutes les autres pages de ce site. Veillez à vérifier les informations auprès des sources officielles de l'EPFL.
vignette|Un processeur quad-core AMD Opteron. vignette|L’Intel Core 2 Duo E6300 est un processeur double cœur. Un microprocesseur multi-cœur (multi-core en anglais) est un microprocesseur possédant plusieurs cœurs physiques fonctionnant simultanément. Il se distingue d'architectures plus anciennes (360/91) où un processeur unique commandait plusieurs circuits de calcul simultanés. Un cœur (en anglais, core) est un ensemble de circuits capables d’exécuter des programmes de façon autonome.
thumb|Principe de l’hyper-threading. Hyper-threading (officiellement appelée Hyper-Threading Technology (HTT) ou HT Technology (HT)) est la mise en œuvre par l'entreprise Intel du simultaneous multithreading (SMT) à deux voies dans ses microprocesseurs. Le premier modèle grand public de la gamme à en bénéficier fut le Pentium 4 Northwood cadencé à . Le Xeon Northwood en bénéficia auparavant. Schématiquement, l’hyper-threading consiste à créer deux processeurs logiques sur une seule puce, chacun doté de ses propres registres de données et de contrôle, et d’un contrôleur d’interruptions particulier.
thumb|Schéma d'un process multithread Un processeur est dit multithread s'il est capable d'exécuter efficacement plusieurs threads simultanément. Contrairement aux systèmes multiprocesseurs (tels les systèmes multi-cœur), les threads doivent partager les ressources d'un unique cœur : les unités de traitement, le cache processeur et le translation lookaside buffer ; certaines parties sont néanmoins dupliquées : chaque thread dispose de ses propres registres et de son propre pointeur d'instruction.
Beginning with a basic pipeline processor, student will learn to implement intriguing architectural techinques through a series of labs. The class will emphasize the implementation, debugging, and ana
Multiprocessors are a core component in all types of computing infrastructure, from phones to datacenters. This course will build on the prerequisites of processor design and concurrency to introduce
The course studies techniques to exploit Instruction-Level Parallelism (ILP) statically and dynamically. It also addresses some aspects of the design of domain-specific accelerators. Finally, it explo
Explore le parallélisme dans la programmation, en mettant l'accent sur les compromis entre la programmabilité et la performance, et introduit la programmation parallèle en mémoire partagée à l'aide d'OpenMP.
Explore le multithreading dans l'architecture informatique, en se concentrant sur l'utilisation du pipeline et l'impact sur les performances dans diverses techniques, y compris le multithreading bloqué et à grain fin.
The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators.Specialized hardware has already redefined ...
EPFL2023
, ,
Cycles are one of the fundamental subgraph patterns and being able to enumerate them in graphs enables important applications in a wide variety of fields, including finance, biology, chemistry, and network science. However, to enable cycle enumeration in r ...
New York2023
, ,
Finding cycles in directed graphs enables important applications in various domains such as finance, biology, chemistry, and network science. However, as the size of graph datasets continues to grow, it becomes increasingly difficult to discover cycles wit ...