Publications associées à Mémoire adressable par contenu

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Two-dimensional materials (2DMs) have found potential applications in many areas of electronics, such as sensing, memory systems, optoelectronics, and power. Despite an intense experimental work, the literature is lacking of accurate modeling of nonvolatil ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads

Robert Giterman

Side-channel attacks constitute a concrete threat to IoT systems-on-a-chip (SoCs). Embedded memories implemented with 6T SRAM macrocells often dominate the area and power consumption of these SoCs. Regardless of the computational platform, the side-channel ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators

Babak Falsafi, Javier Picorel Obando, Abhishek Bhattacharjee

Virtual memory (VM) is critical to the usability and programmability of hardware accelerators. Unfortunately, implementing accelerator VM efficiently is challenging because the area and power constraints make it difficult to employ the large multi-level TL ...

2020

Exploration Methodology for BTI-Induced Failures on RRAM-Based Edge AI Systems

David Atienza Alonso, Alexandre Sébastien Julien Levisse, Miguel Peon Quiros, Marco Antonio Rios

Resistive switching memory technologies (RRAM) are seen by most of the scientific community as an enabler for Edge-level applications such as embedded deep Learning, AI or signal processing of audio and video signals. However, going beyond a "simple'' repl ...

IEEE2020

Accurate deep neural network inference using computational phase-change memory

Irem Boybat Kara, Evangelos Eleftheriou, Abu Sebastian

In-memory computing using resistive memory devices is a promising non-von Neumann approach for making energy-efficient deep learning inference hardware. However, due to device variability and noise, the network needs to be trained in a specific way so that ...

2020

RRAM-VAC: A Variability-Aware Controller for RRAM-based Memory Architectures

David Atienza Alonso, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Shikhar Tuli

The growing need for connected, smart and energy efficient devices requires them to provide both ultra-low standby power and relatively high computing capabilities when awoken. In this context, emerging resistive memory technologies (RRAM) appear as a prom ...

2020

A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories

David Atienza Alonso, Marina Zapater Sancho, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Yasir Mahmood Qureshi, Edouard Giacomin, João Miguel Morgado Pereira Vieira

The need for running complex Machine Learning (ML) algorithms, such as Convolutional Neural Networks (CNNs), in edge devices, which are highly constrained in terms of computing power and energy, makes it important to execute such applications efficiently. ...

2019

Analog Control of Retainable Resistance Multistates in HfO2 Resistive-Switching Random Access Memories (ReRAMs)

Elmira Shahrabi, Yusuf Leblebici, Jury Sandrini, Carlo Ricciardi, Cecilia Giovinazzo, Oguz Tolga Celik

Resistive-switching random access memory (ReRAM) technologies are nowadays a good candidate to overcome the bottleneck of Von Neumann architectures, taking advantage of their logic-in-memory capability and the ability to mimic biological synapse behavior. ...

AMER CHEMICAL SOC2019

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Mémoire adressable par contenu

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

In-Memory Hardware and Architectural Extensions for Workloads Acceleration

Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads

Exploring ferroelectricity in HfO2-based thin films by tackling application-relevant challenges

SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators

Exploration Methodology for BTI-Induced Failures on RRAM-Based Edge AI Systems

Accurate deep neural network inference using computational phase-change memory

RRAM-VAC: A Variability-Aware Controller for RRAM-based Memory Architectures

A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories

Analog Control of Retainable Resistance Multistates in HfO2 Resistive-Switching Random Access Memories (ReRAMs)

Graph Chatbot

Chattez avec Graph Search

A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories

Analog Control of Retainable Resistance Multistates in HfO2 Resistive-Switching Random Access Memories (ReRAMs)

Exploring ferroelectricity in HfO2-based thin films by tackling application-relevant challenges

In-Memory Hardware and Architectural Extensions for Workloads Acceleration

Accurate deep neural network inference using computational phase-change memory

SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Exploration Methodology for BTI-Induced Failures on RRAM-Based Edge AI Systems

Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads

RRAM-VAC: A Variability-Aware Controller for RRAM-based Memory Architectures