Concept

Intégrité du signal

Publications associées (51)

A sub-µA power management circuit in 0.18µm CMOS for energy harvesters

Pierre-André Farine, Cyril Botteron, Christian Robert, Gabriele Tasselli

We explore a miniature sensor node that could be placed in an environment which would interrogate, take decisions and transmit autonomously and seamlessly without the need of a battery. With the system completely powered by an energy harvester for autonomo ...

2013

Developing Highly-Integrated Subcutaneous Biochips for Remote Monitoring of Human Metabolism

Giovanni De Micheli, Sandro Carrara, Jacopo Olivo, Andrea Cavallini, Seyedeh Sara Ghoreishizadeh

A highly integrated system for remote monitoring of several human metabolites is proposed. It is obtained by integrating several components, such as: bio-probes, carbon nanotubes, micro-fabricated gold-electrodes, temperature and pH sensors, extremely smal ...

Ieee2012

Design techniques and analysis of high-resolution neural recording systems targeting epilepsy focus localization

Alexandre Schmid, Mahsa Shoaran, Yusuf Leblebici

The design of a high-density neural recording system targeting epilepsy monitoring is presented. Circuit challenges and techniques are discussed to optimize the amplifier topology and the included OTA. A new platform supporting active recording devices tar ...

Ieee2012

Modeling Stressed MOS Oxides Using a Multiphonon-Assisted Quantum Approach—Part I: Impedance Analysis

Alexandre Schmid, Yusuf Leblebici, Davide Garetto

Complementary MOS device electrical performances are considerably affected by the degradation of the oxide lay- ers and Si/SiO2 interfaces. A general expression for electrically stressed MOS impedance has been derived and applied within the nonradiative mu ...

Institute of Electrical and Electronics Engineers2012

Amplitude modulation based readout for very dense active microelectrode arrays

Alexandre Schmid, Yusuf Leblebici, Neil Joye

A readout method which is suitable for high-density active microelectrode arrays used in electrophysiology experiments is presented. Amplitude modulation of consecutive channels enables simultaneous recording and transmission of the signals recorded on mul ...

2011

Smart Power IC simulation of substrate coupled current due to majority and minority carriers transports

Maher Kayal, Jean-Michel Sallese, Fabrizio Lo Conte

This paper presents a new approach for substrate parasitic current simulation in smart power integrated circuit. A new compact modeling approach developed in previous work has been used to create an equivalent substrate schematic. The latter is composed of ...

2010

Towards generic low-power area-efficient standard cell based memory architectures

Andreas Peter Burg, Pascal Andreas Meinerzhagen

Digital IC designers often use SRAM macrocells to implement on-chip memory functionality. In this paper we argue that in several situations, standard cell based memories (SCMs) can have advantages over SRAM macrocells. Various ways to implement SCMs are pr ...

IEEE2010

Electrical modeling and design of a wafer-level package for MEM resonators

Mihai Adrian Ionescu, Anja Skrivervik, Julien Perruisseau-Carrier, Marco Mazza

This paper presents the electrical design and characterization of a wafer-level, or 0-level, package for micro-electromechanical resonators. We start by identifying the requirements on the electrical parasitics of a packaged resonator, derived from an anal ...

Institute of Electrical and Electronics Engineers2010

SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3D Systems on Chips

Giovanni De Micheli, Luca Benini, Srinivasan Murali, Ciprian Seiculescu

Three-dimensional integrated circuits (3D-ICs) are a promising approach to address the integration challenges faced by current systems on chips (SoCs). Designing an efficient network on chip (NoC) interconnect for a 3-D SoC that meets not only the applicat ...

2010

Optimization of the wire grid size for differential routing: Analysis and impact on the power-delay-area tradeoff

Yusuf Leblebici, Stéphane Badel

In this paper, the impact of the wire grid size on the power-delay-area trade off of VLSI digital circuits with differential routing is analyzed. To this aim, the differential MOS current-mode logic (MCML) is adopted as reference logic style, and a complet ...

Elsevier2010

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