Concept

Diode logic

Publications associées (67)

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Hassan Ghasemzadeh Mohammadi

Controllable-Polarity Silicon Nanowire Transistors (CP-SiNWFETs) are among the promising candidates to complement or even replace the current CMOS technology in the near future. Polarity control is a desirable property that allows the on-line configuration ...
Institute of Electrical and Electronics Engineers2015

Polarity Control at Runtime

Michele De Marchi

Semiconductor device research for digital circuit design is currently facing increasing challenges to enhance miniaturization and performance. A huge economic push and the interest in novel applications are stimulating the development of new pathways to ov ...
EPFL2015

Efficient quantum mechanical simulation of band-to-band tunneling

Mihai Adrian Ionescu, Cem Alper, José Luis Padilla de la Torre, Pierpaolo Palestri

In this work, we extend an already existing simulator for tunnel FETs to fully take into account nonparabolicity (NP) of the conduction band in all aspects, namely the wave-function (WF) and density of states (DOS) corrections for both charge and BTBT curr ...
IEEE2015

Controllable polarity fet based arithmetic and differential logic

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

A logic gate with three inputs A, B, and C, and one output implementing a function MAJ(A,B,C)=AB+BC+A*C comprising two mutually exclusive transmission gates (TGs) connected in series, based on two parallel double-gate controllable polarity devices, a pol ...
2014

Low Power Wake-up Receiver

Lorenz Flavio Schmid

With more devices becoming mobile, power consumption of communication becomes crucial. Wake-up receivers present an energy-ecient way of detecting incoming transmissions while at the same time the main radio can be fully powered down. After detection the r ...
2014

Cmos compatible non-volatile latch and d-flip flop using resistive switching materials

Davide Sacchetto, Yusuf Leblebici, Tugba Demirci

A non-volatile latch circuitry, comprising a Re RAM cell configured to store a final value of the non-volatile latch circuitry; a data selection circuitry configured to connect or disconnect a data input to a plus voltage node and a minus voltage node of t ...
2014

Scanning Laser-Beam-Induced Current Measurements of Lateral Transport Near-Junction Defects in Silicon Heterojunction Solar Cells

Christophe Ballif, Antoine Descoeudres, Stefaan De Wolf

We report the results of scanning laser-beam-induced current (LBIC) measurements on silicon heterojunction solar cells that indicate the length scale over which photogenerated carriers are sensitive to local defects at the amorphous silicon/crystalline sil ...
Ieee-Inst Electrical Electronics Engineers Inc2014

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