Concept

Dennard scaling

Publications associées (36)

On performance scaling and speed of junctionless transistors

A prospective study of the junctionless transistors (JLTs) scaling performances based both on TCAD and analytical evaluations of the intrinsic delay after considering on/off voltage constraints is proposed. The tradeoffs between speed and switching power p ...

Pergamon-Elsevier Science Ltd2013

Design methodology for ultra low-power analog circuits using next generation BSIM6 MOSFET compact model

Christian Enz, Anurag Mangla, Maria-Anna Chalkiadaki

The recently proposed BSIM6 bulk MOSFET compact model is set to replace the hitherto widely used BSIM3 and BSIM4 models as the de-facto industrial standard. Unlike its predecessors which were threshold voltage based, the BSIM6 core is charge based and thus ...

Elsevier2013

Exploration of Sub-VT and Near-VT 2T Gain-Cell Memories for Ultra-Low Power Applications under Technology Scaling

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Pascal Andreas Meinerzhagen

Ultra-low power applications often require several kb of embedded memory and are typically operated at the lowest possible operating voltage (VDD) to minimize both dynamic and static power consumption. Embedded memories can easily dominate the overall sili ...

2013

Dark Silicon Accelerators for Database Indexing

Babak Falsafi, Yusuf Onur Koçberber, Kevin Lim

The growing explosion of digital data motivates renewed emphasis on new architectures for future data-centric workloads. At the same time, the inability of power to scale with increasing transistor counts has led to a recent focus on “dark silicon” designs ...

2012

It's the End of the World as We Know It (And I Feel Fine)

James Richard Larus

The end of Dennard scaling and the imminent end of semiconductor feature scaling means that software systems and applications will no longer benefit from 40% per annum performance increases, a continually rising tide that lifted all boats. Future software ...

Springer2012

Design Methodology for Ultra Low-Power Analog Circuits using Next Generation BSIM 6 Compact Model

Christian Enz, Anurag Mangla, Maria-Anna Chalkiadaki

The design of analog circuits strongly relies on the accuracy of the models available in the circuit simulators. The recently proposed BSIM6 bulk MOSFET compact model is set to replace the hitherto widely used BSIM3 and BSIM4 models as the de-facto industr ...

2012

Reliability in the Dark Silicon Era

Babak Falsafi

Information technology is now an indispensable pillar of a modern-day society, thanks to the proliferation of digital platforms in the past several decades. The demand on robust and economical data processing and storage, however, is growing faster than te ...

IEEE Computer Soc Press, Customer Service Center, Po Box 3014, 10662 Los Vaqueros Circle, Los Alamitos, CA 907202011

Reducing the Pressure on Routing Resources of FPGAs with Generic Logic Chains

Paolo Ienne, Grace Zgheib, Philip Brisk, Hadi Parandeh Afshar

Routing resources in modern FPGAs use 50% of the silicon real estate and are significant contributors to critical path delay and power consumption; the situation gets worse with each successive process generation, as transistors scale more effectively than ...

Acm Order Department, P O Box 64145, Baltimore, Md 21264 Usa2011

AdS black disk model for small-x DIS

Using the approximate conformal invariance of QCD at high energies we consider a simple AdS black disk model to describe saturation in DIS. Deep inside saturation the structure functions have the same power law scaling, F(T) similar to F(L) similar to x(-o ...

Amer Inst Physics2011

Integration of Engineered Source and Drain Extensions in Double Gate Mosfet with Sub-32nm Channel Length

Jyotshna Bhandari

Since the advent of CMOS technology, the semiconductor industry has been successful in achieving continuously improved performance. The feature size of the most important electronic device, the Metal Oxide Semiconductor Field Effect Transistor (MOSFET), ha ...

EPFL2011

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