Publications associées à Mémoire flash

A Time-Division Multiplexing Signaling Scheme for Inter-Symbol/Channel Interference Reduction in Low-Power Multi-Drop Memory Links

Seyed Armin Tajalli, Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust, Chen Cao

A time-division multiplexing (TDM) digital channel coding scheme with inter-symbol interference (ICI) reduction property for multi-drop memory interfaces has been proposed. Shaping the TX spectrum to avoid channel frequency notches, the proposed digital TD ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Effect of metal buffer layer and thermal annealing on HfOx-based ReRAMs

Elmira Shahrabi, Igor Krawczuk, Yusuf Leblebici, Jury Sandrini, Behnoush Attarimashalkoubeh

In this paper, we investigate different methods and approaches in order to improve the electrical characteristics of Pt/HfOx/TiN ReRAM devices. We discuss the improvement of the ReRAM electrical characteristics after the insertion of a Hf and Ti buffer lay ...

Ieee2016

Key/Value-enabled Flash Memory for Complex Scientific Workflows with On-line Analysis and Visualization

Stefan Eilemann, Alessandro Curioni, Peter Morjan, Blake Fitch, Bernard Metzler, Lars Schneidenbach, Ralph Bellofatto, Peter Kaltstein

Scientific workflows are often composed of compute-intensive simulations and data-intensive analysis and visualization, both equally important for productivity. High-performance computers run the compute-intensive phases efficiently, but data-intensive pro ...

Ieee2016

Multilevel-Cell Phase-Change Memory: A Viable Technology

Milos Stanisavljevic, Aravinthan Athmanathan, Evangelos Eleftheriou

In order for any non-volatile memory (NVM) to be considered a viable technology, its reliability should be verified at the array level. In particular, properties such as high endurance and at least moderate data retention are considered essential. Phase-ch ...

Ieee-Inst Electrical Electronics Engineers Inc2016

A Fully-Digital Spectrum Shaping Signaling for Serial-Data Transceiver with Crosstalk and ISI Reduction Property in Multi-Drop Memory Interfaces

Seyed Armin Tajalli, Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust

An efficient signaling scheme for serial-data transceivers (TRXs) has been proposed, which can properly reduce inter-symbol interference (ISI) and crosstalk (Xtalk) in memory interfaces. The proposed architecture relies on fully-digital implementation rath ...

Ieee2016

Power, Area, and Performance Optimization of Standard Cell Memory Arrays Through Controlled Placement

Andreas Peter Burg, Adam Shmuel Teman, Luca Benini, Pascal Andreas Meinerzhagen

Embedded memory remains a major bottleneck in current integrated circuit design in terms of silicon area, power dissipation, and performance; however, static random access memories (SRAMs) are almost exclusively supplied by a small number of vendors throug ...

Association for Computing Machinery2016

Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications

Mohammad Amin Shokrollahi, Anant Pratap Singh

Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices. Controller-side and memory-side embodiments of such channel interfaces are ...

2016

Differential vector storage for dynamic random access memory

Mohammad Amin Shokrollahi, Harm Cronie

A storage device stores data in groups of memory cells using vectors corresponding to voltage code codewords, each codeword having k entries. Entries have values selected from a set of at least three entry values and 2.sup.n distinct inputs can be encoded ...

2016

Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric

Mihai Adrian Ionescu, Ali Saeidi, Arnab Biswas

The implementation and operation of the nonvolatile ferroelectric memory (NVM) tunnel field effect transistors with silicon-doped HfO2 is proposed and theoretically examined for the first time, showing that ferroelectric nonvolatile tunnel field effect tra ...

2016

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Mémoire flash

A Time-Division Multiplexing Signaling Scheme for Inter-Symbol/Channel Interference Reduction in Low-Power Multi-Drop Memory Links

Effect of metal buffer layer and thermal annealing on HfOx-based ReRAMs

Key/Value-enabled Flash Memory for Complex Scientific Workflows with On-line Analysis and Visualization

Multilevel-cell phase-change memory

Multilevel-Cell Phase-Change Memory: A Viable Technology

A Fully-Digital Spectrum Shaping Signaling for Serial-Data Transceiver with Crosstalk and ISI Reduction Property in Multi-Drop Memory Interfaces

Power, Area, and Performance Optimization of Standard Cell Memory Arrays Through Controlled Placement

Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications

Differential vector storage for dynamic random access memory

Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric

Graph Chatbot

Chattez avec Graph Search

A Time-Division Multiplexing Signaling Scheme for Inter-Symbol/Channel Interference Reduction in Low-Power Multi-Drop Memory Links

Multilevel-cell phase-change memory

Multilevel-Cell Phase-Change Memory: A Viable Technology

Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications

Differential vector storage for dynamic random access memory

Effect of metal buffer layer and thermal annealing on HfOx-based ReRAMs

Key/Value-enabled Flash Memory for Complex Scientific Workflows with On-line Analysis and Visualization

A Fully-Digital Spectrum Shaping Signaling for Serial-Data Transceiver with Crosstalk and ISI Reduction Property in Multi-Drop Memory Interfaces

Power, Area, and Performance Optimization of Standard Cell Memory Arrays Through Controlled Placement

Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric