Concept

Altera

Publications associées (102)

1024-Channel 3D Ultrasound Digital Beamformer in a Single 5W FPGA

Jean-Philippe Thiran, Giovanni De Micheli, Federico Angiolini, Aya Mohamed Naguib Ahmed Ibrahim

3D ultrasound, an emerging medical imaging technique that is presently only used in hospitals, has the potential to enable breakthrough telemedicine applications, provided that its cost and power dissipation can be minimized. In this paper, we present an F ...

IEEE2017

High level synthesis of Smith-Waterman dataflow implementations

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

The paper presents the results of design explorations for the implementation of the Smith-Waterman (S-W) algorithm executing DNA and protein sequences alignment. Both design explorations studies and the corresponding FPGA implementations are obtained by wr ...

2017

LinoSPAD: A Compact Linear SPAD Camera System with 64 FPGA-Based TDC Modules for Versatile 50 ps Resolution Time-Resolved Imaging

Edoardo Charbon, Claudio Bruschini, Samuel Burri

The LinoSPAD camera system is a modular, compact and versatile time-resolved camera system, combining a linear 256 high fill factor pixel CMOS SPAD (single-photon avalanche diode) sensor with an FPGA (field-programmable gate array) and USB 3.0 transceiver ...

2017

Virtualized Execution Runtime for FPGA Accelerators in the Cloud

Paolo Ienne, Mikhail Asiatici, Nithin George

FPGAs offer high performance coupled with energy efficiency making them extremely attractive computational resources within a cloud ecosystem. However, to achieve this integration and make them easy to program, we first need to enable users with varying ex ...

2017

Single-FPGA complete 3D and 2D medical ultrasound imager

Jean-Philippe Thiran, Giovanni De Micheli, Federico Angiolini, Marcel Arditi, Aya Mohamed Naguib Ahmed Ibrahim, Damien Doy

3D ultrasound (US) acquisition acquires volumetric images, thus alleviating a classical US imaging bottleneck that requires a highly-trained sonographer to operate the US probe. However, this opportunity has not been explored in practice, since 3D US machi ...

IEEE2017

Parallel FPGA routing: Survey and challenges

Mirjana Stojilovic

As transistor scaling is slowing down [1], other opportunities for ensuring continuous performance increase have to be explored. Field programmable gate arrays (FPGAs) are in the spotlight these days: not only due to their malleability and energy efficienc ...

2017

Exploiting Satisfiability Solvers for Efficient Logic Synthesis

Ana Petkovska

Logic synthesis is an important part of electronic design automation (EDA) flows, which enable the implementation of digital systems. As the design size and complexity increase, the data structures and algorithms for logic synthesis must adapt and improve ...

EPFL2017

Thermal aware design and comparative analysis of a high performance 64-bit adder in FD-SOI and bulk CMOS technologies

Yusuf Leblebici

Thermal behaviours of high-performance digital circuits in bulk CMOS and FDSOI technologies are compared on a 64-bit Kogge-Stone adder designed in 40nm CMOS node. Temperature profiles of the adder in bulk and FDSOI are extracted with thermal simulations an ...

Elsevier Science Bv2017

Single-FPGA, Scalable, Low-Power, and High-Quality 3D Ultrasound Beamformer

Jean-Philippe Thiran, Giovanni De Micheli, Federico Angiolini, Marcel Arditi, Aya Mohamed Naguib Ahmed Ibrahim, Ahmet Caner Yüzügüler

We present an efficient FPGA architecture suitable for a medical 3D ultrasound beamformer. We tackle the delay calculation bottleneck, which is the heart and the most critical part of the beam-former, by proposing a computationally efficient design that is ...

Ieee2016

A Full-Capacity Local Routing Architecture for FPGAs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang

Reconfigurable systems employ highly-routable local routing architecture to interconnect generic fine-grain logic blocks. Commercial FPGAs employ 50% sparse crossbars rather than fully-connected crossbars in their local routing architecture to trade off be ...

2016

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