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Publications associées (26)
33.3 MiBMI: A 192/512-Channel 2.46mm² Miniaturized Brain-Machine Interface Chipset Enabling 31-Class Brain-to-Text Conversion Through Distinctive Neural Codes
Mahsa Shoaran, Uisub Shin, Gregor Rainer, Mohammad Ali Shaeri, Amitabh Yadav
Recently, cutting-edge brain-machine interfaces (BMIs) have revealed the potential of decoders such as recurrent neural networks (RNNs) in predicting attempted handwriting [1] or speech [2], enabling rapid communication recovery after paralysis. However, c ...
IEEE2024System-Level Exploration of In-Package Wireless Communication for Multi-Chiplet Platforms
David Atienza Alonso, Marina Zapater Sancho, Giovanni Ansaloni, Rafael Medina Morillas, Joshua Alexander Harrison Klein
Multi-Chiplet architectures are being increasingly adopted to support the design of very large systems in a single package, facilitating the integration of heterogeneous components and improving manufacturing yield. However, chiplet-based solutions have to ...
2023Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference
David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina
By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...
2023A 128-kbit GC-eDRAM With Negative Boosted Bootstrap Driver for 11.3x Lower-Refresh Frequency at a 2.5% Area Overhead in 28-nm FD-SOI
Andreas Peter Burg, Robert Giterman, Halil Andac Yigit, Emmanuel Nieto Casarrubias
Gain-cell embedded DRAM (GC-eDRAM) is a high-density logic-compatible alternative to conventional static random-access memory (SRAM) and embedded DRAM (eDRAM). However, GC-eDRAM suffers from a reduced data retention time (DRT) at deeply-scaled process node ...
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023Adaptive R-Peak Detection on Wearable ECG Sensors for High-Intensity Exercise
David Atienza Alonso, Tomas Teijeiro Campo, Grégoire Millet, Elisabetta De Giovanni
Objective: Continuous monitoring of biosignals via wearable sensors has quickly expanded in the medical and wellness fields. At rest, automatic detection of vital parameters is generally accurate. However, in conditions such as high-intensity exercise, sud ...
2022Gem5-X : A Many-Core Heterogeneous Simulation Platform for Architectural Exploration and Optimization
David Atienza Alonso, Marina Zapater Sancho, William Andrew Simon, Yasir Mahmood Qureshi
The increasing adoption of smart systems in our daily life has led to the development of new applications with varying performance and energy constraints, and suitable computing architectures need to be developed for these new applications. In this paper, ...
2021Equinox: Training (for Free) on a Custom Inference Accelerator
Babak Falsafi, Martin Jaggi, Louis Coulon, Ahmet Caner Yüzügüler, Mario Paulo Drumond Lages De Oliveira, Arash Pourhabibi Zarandi
DNN inference accelerators executing online services exhibit low average loads because of service demand variability, leading to poor resource utilization. Unfortunately, reclaiming idle inference cycles is difficult as other workloads can not execute on a ...
ACM2021High-Level Synthesis of Dynamically Scheduled Circuits
High-Level Synthesis (HLS) tools generate hardware designs from high-level programming languages. These tools almost universally build datapaths that are controlled using a centralized controller which relies on a static, compile-time schedule to determine ...
EPFL2021Performance characterization of Altera and Xilinx 28 nm FPGAs at cryogenic temperatures
Edoardo Charbon, Harald Arjan Robert Homulle
Quantum computers enable a massive speed-up in calculations, thanks to the nature of quantum operations. To unlock quantum computation, a classical system infrastructure is required for the control of qubits and processing of their data. While qubits are g ...
2018Post-P&R Performance and Power Analysis for RRAM-based FPGAs
Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Edouard Giacomin
Resistive Random Access Memory (RRAM)-based FPGAs are predicted to outperform conventional FPGAs architectures in area, delay and power over a wide range of voltage operations, allowing novel energy-quality trade-offs for reconfigurable computing. The oppo ...
2018