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Marc Pastre

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Publications associées (38)

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A Fully Integrated Hall Sensor Microsystem for Contactless Current Measurement

Maher Kayal, Marc Pastre, Andrea Ajbl

Contactless current measurement based on Hall-effect sensors can be performed in either closed-or open-loop configuration. In this paper an open-loop sensor system with a current-mode output is described. The system measures the magnetic field induced arou ...

Ieee2012

Tunable floating active inductor with internal offset reduction

Maher Kayal, François Krummenacher, Marc Pastre, Laurent Fabre, Ira Nagel

Presented is a transistor-level implementation of a floating and tunable CMOS active inductor. It is based on the classical gyrator-C topology and is enhanced by adding an internal offset reduction mechanism to guarantee functionality also for unbalanced D ...

2012

This paper presents a MEMS-based 5th-order Delta Sigma capacitive accelerometer. The Delta Sigma loop is implemented in mixed signal, the global 5th-order filter having a 2nd-order analog and a 3rd-order digital part. The system can be used with a wide ran ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2011

A fully integrated Hall sensor microsystem with current-mode output

Maher Kayal, Marc Pastre, Andrea Ajbl

This paper presents a fully integrated Hall sensor microsystem with a current-mode output. The system operates in open-loop and includes a Hall sensor with internal biasing, a fully differential front-end, a preamplifier chain and a voltage-to-current conv ...

2011

A current-mode back-end for a sensor microsystem

Maher Kayal, Marc Pastre, Andrea Ajbl

is paper presents a voltage-to-current converter as a current-mode output buffering stage for sensor interfaces. The converter can be used in any microsystem needing a current output. It is presented here in the context of a Hall sensor microsystem. The sy ...

IEEE2011

Inversion factor based design methodology using the EKV MOS model

Maher Kayal, Marc Pastre, Andrea Ajbl

This paper presents a hierarchical design methodology based on the inversion factor (IF) as a key design parameter and the equations of the EKV MOS Model. A structured design approach is used to allow high flexibility. The efficiency of the methodology is ...

2011

Towards circuit design using VeSFETs

Maher Kayal, Jean-Michel Sallese, François Krummenacher, Marc Pastre, Lucian Barbut

This paper explores the potential of VeFETs for mixed-signal circuits. A new physics-based compact DC model of the VeSFET operated in subthreshold region is presented and used to derive 1st-order sensitivities of the device threshold voltage to process var ...

2011

An internally non-linear ADC for a ΣΔ accelerometer loop

Maher Kayal, Marc Pastre

If an analog-to-digital converter (ADC) is used within a ΣΔ converter such that the loop filter is mixed signal, then the ADC does not need to have the full resolution of the ΣΔ converter, and its input values will not be uniformly distributed over the inp ...

2010

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This paper presents a modeling strategy to simulate the propagation of electrical perturbations induced by direct biasing of substrate junctions. Usually, this is done by identifying parasitic substrate devices such as bipolar transistors. However, mapping ...

2010

A circuit-level substrate current model for smart-power ICs

Maher Kayal, Jean-Michel Sallese, François Krummenacher, Marc Pastre, Fabrizio Lo Conte

This paper presents a new modeling methodology accounting for generation and propagation of minority carriers that can be used directly in circuit-level simulators in order to estimate coupled parasitic currents. The method is based on a new compact model ...

Institute of Electrical and Electronics Engineers2010