Publications associées à Power aware data and memory management for dynamic applications

How to Achieve Large-Area Ultra-Fast Operation of MoS 2 Monolayer Flash Memories?

Aleksandra Radenovic, Andras Kis, Mukesh Kumar Tripathi, Zhenyu Wang, Asmund Kjellegaard Ottesen, Yanfei Zhao, Guilherme Migliato Marega, Hyungoo Ji

Memory devices have returned to the spotlight due to increasing interest in using in-memory computing architectures to make data-driven algorithms more energy-efficient. One of the main advantages of this architecture is the efficient performance of vector ...

2023

HetCache: Synergising NVMe Storage and GPU acceleration for Memory-Efficient Analytics

Anastasia Ailamaki, Periklis Chrysogelos, Hamish Mcniece Hill Nicholson, Syed Mohammad Aunn Raza

Accessing input data is a critical operation in data analytics: i) slow data access significantly degrades performance, and ii) storing everything in the fastest medium, i.e., memory, incurs high operational and hardware costs. Further, while GPUs offer in ...

2023

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Andreas Peter Burg, Reza Ghanaatian Jahromi

A method of accessing a memory space of a memory device with a decoder, the memory space having faults, including the steps of performing a memory access operation by an electronic device to a access a logical memory space of the memory device, and randomi ...

2022

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Andras Kis, Guilherme Migliato Marega

Two-dimensional materials (2DMs) have found potential applications in many areas of electronics, such as sensing, memory systems, optoelectronics, and power. Despite an intense experimental work, the literature is lacking of accurate modeling of nonvolatil ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Rethinking Software Runtimes for Disaggregated Memory

Sanidhya Kashyap, Ivan Puddu

Disaggregated memory can address resource provisioning inefficiencies in current datacenters. Multiple software runtimes for disaggregated memory have been proposed in an attempt to make disaggregated memory practical. These systems rely on the virtual mem ...

ASSOC COMPUTING MACHINERY2021

Access pattern based optimization of memory access

Anastasia Ailamaki, Georgios Psaropoulos

A method for optimizing memory access for database operations is provided. The method may include identifying an access pattern associated with a database operation. The access pattern may include data required to perform the database operation. One or mor ...

2020

Gain-Cell Embedded DRAMs: Modeling and Design Space

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Andrea Bonetti

Among the different types of DRAMs, gain-cell embedded DRAM (GC-eDRAM) is a compact, low-power and CMOS-compatible alternative to conventional SRAM. GC-eDRAM achieves high memory density as it relies on a storage cell that can be implemented with as few as ...

IEEE2020

SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators

Babak Falsafi, Javier Picorel Obando, Abhishek Bhattacharjee

Virtual memory (VM) is critical to the usability and programmability of hardware accelerators. Unfortunately, implementing accelerator VM efficiently is challenging because the area and power constraints make it difficult to employ the large multi-level TL ...

2020

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Power aware data and memory management for dynamic applications

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Rebooting Virtual Memory with Midgard

How to Achieve Large-Area Ultra-Fast Operation of MoS 2 Monolayer Flash Memories?

HetCache: Synergising NVMe Storage and GPU acceleration for Memory-Efficient Analytics

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Rethinking Software Runtimes for Disaggregated Memory

Access pattern based optimization of memory access

Gain-Cell Embedded DRAMs: Modeling and Design Space

SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators

Graph Chatbot

Chattez avec Graph Search

Rebooting Virtual Memory with Midgard

How to Achieve Large-Area Ultra-Fast Operation of MoS 2 Monolayer Flash Memories?

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

HetCache: Synergising NVMe Storage and GPU acceleration for Memory-Efficient Analytics

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Rethinking Software Runtimes for Disaggregated Memory

Gain-Cell Embedded DRAMs: Modeling and Design Space

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Access pattern based optimization of memory access

SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators