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High-precision DAC based on a self-calibrated sub-binary radix converter

Publications associées (33)

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Kohonen Winner Takes All Neural Network Realized on Microcontrollers with AVR and ARM Cores

Rafal Tomasz Dlugosz

This paper presents realization and the laboratory tests of the Kohonen winner takes all (WTA) neural network (NN) realized on microcontrollers (μC) with the AVR and ARM CortexM3 cores. Both μCs have been placed on a single testing board especially designe ...

Technical University of Lodz2010

Nanowatt Range Folding-Interpolating ADC Using Subthreshold Source-Coupled Circuits

Seyed Armin Tajalli, Yusuf Leblebici

A very low power mixed-signal design methodology based on subthreshold source-coupled circuits is presented, and a nano-Watt range analog-to-digital converter (ADC) circuit based on folding-interpolating topology is proposed as a complete design example. T ...

2010

Parallel architecture for high-speed analog-to-digital conversion

Guillaume Ding

Nowadays digital signal processing systems used for radar applications, communication systems or RF measurement equipments, require very high sample-rates. Sometimes these sample-rates are beyond the possibilities offered by conventional ADCs. To overcome ...

EPFL2009

Mixed-domain system representation using Volterra series

Martin Hasler

Mixed-signal systems combine analog and digital signal processing in one overall design that should be integrated as a single system on chip. At system level, the separation into isolated subsystem representations for analog and digital parts needs to be o ...

IEEE2008

A Subthreshold SCL Based Pipelined Encoder for Ultra-Low Power 8-bit Folding/Interpolating ADC

Seyed Armin Tajalli, Yusuf Leblebici, Mohammad Beikahmadi

The subthreshold MOS source-coupled logic (STSCL) technique is of great interest for designing ultra low power circuits. In this paper we discuss the design of a pipelined encoder for an 8-bit folding and interpolating (F&I) analog-to-digital (ADC) data co ...

NORCHIP2008

Reducing the number of comparators in multi-bit ΔΣ modulators

Maher Kayal

Multi-bit feedback, being one way of lowering ΔΣ modulators power consumption, has a major obstacle: the number of components in the internal analog-to-digital converter (ADC) and digital-to-analog converter (DAC). Nevertheless, the number of comparators i ...

2008

MOS current-mode logic standard cells for high-speed low-noise applications

Stéphane Badel

With the continuous shrinking of devices dimensions in microelectronic circuits, it is becoming extremely desirable to integrate analog circuitry together with complex digital logic blocks. The noise generated by the digital parts in a mixed-signal integra ...

EPFL2008

Mixed-mode implementation of particle filters

Volkan Cevher

In this paper, we develop new mixed-mode implementations for particle filters and compare them to a digital implementation. The motivation for the mixed-mode implementation is to achieve low-power implementation of particle filters. The specific applicatio ...

2007

FD SOI Hall sensor electronics interfaces for energy measurement

Maher Kayal

This paper presents a SOI Hall sensor based microsystem for energy measurement. The mixed-mode signal circuitry has been entirely designed and integrated in the experimental 0.5 mu m fully depleted SOI 3 V technology. It consists of an integrated Hall elem ...

2006

Methodology for the digital calibration of analog circuits and systems

Marc Pastre

This thesis presents a complete methodology for the digital calibration of analog circuits. It shows how to relax the extreme design constraints in analog circuits, allowing the realization of high-precision systems even with low-performance components. In ...

EPFL2005