Monolithic integration of Si nanowires with metallic electrodes: NEMS resonator and switch applications
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Si nanowire (NW) stacks are fabricated by utilizing the scalloping effect of inductively coupled plasma deep reactive ion etching. When two etch windows are brought close enough, scallops from both sides will ideally meet along the dividing centerline of t ...
Institute of Electrical and Electronics Engineers2009
For the past couple of decades the desire to add more complexity to a computer chip, while simultaneously reducing the cost per bit, has been accommodated by down-scaling. This approach has been extremely successful in the past, but like all good things it ...
Using the epitaxy-on electronics (EoE) process, self-electrooptic effect devices (SEED's) have been monolithically integrated with VLSI GaAs electronics., The EoE approach provides both depletion-mode and enhancement-mode MESFET's for large-scale, high-den ...
For the purpose of integrating nanomechanical structures with CMOS circuitry, nanostencil lithography ensures parallel patterning for rapid processing at wafer scale and nanometer-sized features definition. Moreover, this patterning technique is compatible ...
Nanowire crossbar circuits are an emerging architectural paradigm that promises a higher integration density and an improved fault-tolerance due to its reconfigurability. In this paper, we propose for the first time the utilization of the multi-spacer patt ...
The aim of this research is to develop and to evaluate devices and circuits performances based on ultrathin nanograin polysilicon wire (polySiNW) dedicated to room temperature operated hybrid CMOS-"nano" integrated circuits. The proposed polySiNW device is ...
