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Experimental confirmation of temperature dependent negative capacitance in ferroelectric field effect transistor

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Experimental confirmation of temperature dependent negative capacitance in ferroelectric field effect transistor

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Demonstration of subthrehold swing smaller than 60mV/decade in Fe-FET with P(VDF-TrFE)/SiO₂ gate stack

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The Curie temperature as a key design parameter of ferroelectric Field Effect Transistors

1T Memory Cell Based on PVDF-TrFE Field Effect Transistor

Test structure and method for the experimental investigation of internal voltage amplification and surface potential of ferroelectric MOSFETs

Metal-Ferroelectric-Metal-Oxide-Semiconductor Field Effect Transistor with Sub-60mV/decade Subthreshold Swing and Internal Voltage Amplification

Enhanced Curie temperature and nonvolatile switching of ferromagnetism in ultrathin (Ga,Mn)As channels

Ferroelectric transistors with improved characteristics at high temperature

Non-hysteretic ferroelectric tunnel FET with improved conductance at Curie temperature

Non-hysteretic ferroelectric tunnel FET with improved conductance at Curie temperature

Toward a low-voltage multiferroic transistor: Magnetic (Ga,Mn)As under ferroelectric control

Demonstration of subthrehold swing smaller than 60mV/decade in Fe-FET with P(VDF-TrFE)/SiO₂ gate stack