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Surface potential compact model for embedded flash devices oriented to IC memory design

Publications associées (58)

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Resistive Switching Memory Architecture Based on Polarity Controllable Selectors

Alexandre Sébastien Julien Levisse, Pierre-Emmanuel Julien Marc Gaillardon

With the continuous scaling of CMOS technology, integrating an embedded high-density non-volatile memory appears to be more and more costly and technologically challenging. Beyond floating-gate memory technologies, bipolar resistive random access memories ...

2018

The functionalities and performances of today's computing systems are increasingly dependent on the memory block. This phenomenon, also referred as the Von Neumann bottleneck, is the main motivation for the research on memory technologies. Despite CMOS tec ...

EPFL2017

Reducing circuit design complexity for neuromorphic machine learning systems based on Non-Volatile Memory arrays

Yusuf Leblebici, Alessandro Fumarola

Machine Learning (ML) is an attractive application of Non-Volatile Memory (NVM) arrays [1,2]. However, achieving speedup over GPUs will require minimal neuron circuit sharing and thus highly area-efficient peripheral circuitry, so that ML reads and writes ...

2017

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Embedded memory remains a major bottleneck in current integrated circuit design in terms of silicon area, power dissipation, and performance; however, static random access memories (SRAMs) are almost exclusively supplied by a small number of vendors throug ...

Association for Computing Machinery2016

A storage device stores data in groups of memory cells using vectors corresponding to voltage code codewords, each codeword having k entries. Entries have values selected from a set of at least three entry values and 2.sup.n distinct inputs can be encoded ...

2016

Multilevel-cell phase-change memory

Aravinthan Athmanathan

In the modern digital era of big data applications, there is an ever-increasing demand for higher memory capacity that is both reliable and cost effective. In the domain of non-volatile memory systems, Flash-based storage devices have dominated the consume ...

EPFL2016

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This work reports a technique to fabricate ReRAM crossbar arrays co-integrated with fully finished 180 nm CMOS technology chips. The proposed integration method enables low- cost ReRAM-CMOS integration and allows the rapid prototyping of complete memory sy ...

Ieee2016

Effect of metal buffer layer and thermal annealing on HfOx-based ReRAMs

Elmira Shahrabi, Igor Krawczuk, Yusuf Leblebici, Jury Sandrini, Behnoush Attarimashalkoubeh

In this paper, we investigate different methods and approaches in order to improve the electrical characteristics of Pt/HfOx/TiN ReRAM devices. We discuss the improvement of the ReRAM electrical characteristics after the insertion of a Hf and Ti buffer lay ...

Ieee2016

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In order for any non-volatile memory (NVM) to be considered a viable technology, its reliability should be verified at the array level. In particular, properties such as high endurance and at least moderate data retention are considered essential. Phase-ch ...

Ieee-Inst Electrical Electronics Engineers Inc2016

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Scientific workflows are often composed of compute-intensive simulations and data-intensive analysis and visualization, both equally important for productivity. High-performance computers run the compute-intensive phases efficiently, but data-intensive pro ...

Ieee2016