Charge-transport properties of monolayer MoS2 at the interface with dielectric materials

Two-dimensional (2D) semiconductors, consisting of single-sheets of layered transition metal dichalcogenides (TMD), are attracting enormous interest from both fundamental science and technology. Monolayer molybdenum disulfide (MoS2), a typical example from this class of materials, is currently under intense research investigation because its direct band gap, atomic-scale thickness and mechanical flexibility could enable a wide range of novel technological applications, such as low-power flexible/transparent electronics, displays and wearable sensors. Critical to all these applications are the material mechanical strength, the mobility of charge-carriers in the 2D semiconductor and its interaction with the surrounding environment. This thesis describes experimental research conducted on these critical aspects and shows a proof-of-concept device application based on heterostructures of MoS2 and graphene. The main goal of the research was to assess experimentally the potential of monolayer MoS2 for application in flexible electronics. The thesis is based on three papers. The first paper describes the measurements of the in-plane stiffness and breaking strength of free-standing membranes of monolayer MoS2. Nanoindentation experiments were performed with the tip of an atomic force microscope (AFM) to extract the material's Young's modulus (E ~ 270 GPa) and breaking strength (σmax ~ 23 GPa). Breaking occurred at maximum internal strain εint ~ 11%, which indicates that monolayer MoS2 is suitable for integration on flexible plastic substrates. The second paper represents the core work of this thesis. It explores the charge transport properties of monolayer MoS2 supported by different dielectric substrates, such as thin polymer films of parylene, atomically flat sapphire and 2D sheets of hexagonal boron nitride (h-BN). It was found that substrate surface corrugations do not represent a major limit to charge-carrier mobility in monolayer MoS2, which seems at this stage dominated by impurities and material's defects. Field-effect transistors with mobility ~ 100 cm2/Vs and on/off current ratio Ion/Ioff > 10^5 were successfully integrated on parylene substrates, whose root-mean-square roughness Rq can be more than two times larger than the thickness of the transistor channel itself. Because parylene is also a flexible material, this work showed a viable method for the realization of high-mobility and high performance flexible devices based on 2D semiconductors. Finally, the third paper describes a flash-memory cell fabricated using monolayer MoS2/graphene heterostructures and dielectric layers of HfO2 grown by atomic layer deposition (ALD). The architecture of the device resembles that of a floating-gate transistor. Monolayer MoS2 acts as the transistor channel, graphene electrodes are used to collect and inject the charge carriers, and a piece of multilayer graphene serves as ultrathin charge trapping layer. In this paper, it was shown that graphene contacts to monolayer MoS2 result in ohmic-like current-voltage characteristics at room temperature. Moreover, the use of graphene and 2D semiconductors in flash memory technology was indicated as a potential strategy for further scaling of memory cells and for their integration in flexible electronic devices.