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Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications

Publications associées (34)

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Chaosity: Understanding Contemporary NUMA-architectures

Anastasia Ailamaki, Viktor Sanca, Hamish Mcniece Hill Nicholson, Andreea Nica, Syed Mohammad Aunn Raza

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

2023

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Memory devices have returned to the spotlight due to increasing interest in using in-memory computing architectures to make data-driven algorithms more energy-efficient. One of the main advantages of this architecture is the efficient performance of vector ...

2023

Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...

EPFL2023

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Andras Kis, Guilherme Migliato Marega

Two-dimensional materials (2DMs) have found potential applications in many areas of electronics, such as sensing, memory systems, optoelectronics, and power. Despite an intense experimental work, the literature is lacking of accurate modeling of nonvolatil ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Miss-Optimized Memory Systems: Turning Thousands of Outstanding Misses into Reuse Opportunities

Mikhail Asiatici

Even if Dennard scaling came to an end fifteen years ago, Moore's law kept fueling an exponential growth in compute performance through increased parallelization. However, the performance of memory and, in particular, Dynamic Random Access Memory (DRAM), ...

EPFL2021

Memory chip or memory array for wide-voltage range in-memory computing using bitline technology

David Atienza Alonso, Marina Zapater Sancho, Marco Antonio Rios, William Andrew Simon

A random access memory having a memory array having a plurality of local memory groups, each local memory group including a plurality of bitcells arranged in a bitcell column, a pair of local bitlines operatively connected to the plurality of bitcells, a p ...

2021

Non-Volatile Memory (NVM) is an emerging type of memory device that provides fast, byte-addressable, and high-capacity durable storage. NVM sits on the memory bus and allows durable data structures designs similar to the in-memory equivalent ones. Expensiv ...

EPFL2021

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Resistive switching memory technologies (RRAM) are seen by most of the scientific community as an enabler for Edge-level applications such as embedded deep Learning, AI or signal processing of audio and video signals. However, going beyond a "simple'' repl ...

IEEE2020

Magnetic Skyrmions: From Fundamental Physics to Topological Electronics

Henrik Moodysson Rønnow, Dirk Grundler, Jonathan White

In Switzerland the National Science Foundation recently funded a network on Nano-Skyrmionics [https://skyrmions.epfl.ch] joining scientists from various institutions. Here, we provide a status report on selected forefront aspects of the research field. Thi ...

2020

RRAM-VAC: A Variability-Aware Controller for RRAM-based Memory Architectures

David Atienza Alonso, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Shikhar Tuli

The growing need for connected, smart and energy efficient devices requires them to provide both ultra-low standby power and relatively high computing capabilities when awoken. In this context, emerging resistive memory technologies (RRAM) appear as a prom ...

2020