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Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

Publications associées (62)

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Twentieth century has been the golden age of semiconductor industry by achieving a high level of growth as a courtesy of developments in fabrication techniques and downscaling of the technology. Since the downscaling in current lithography technology is re ...

EPFL2017

Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Edouard Giacomin

Routing multiplexers based on pass-transistors or transmission gates are an essential components in many digital integrated circuits. However, whatever structure is employed, CMOS multiplexers have two major limitations: 1) their delay is linearly related ...

Ieee-Inst Electrical Electronics Engineers Inc2017

8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment

Kyojin Choo

Digital PLLs are popular for on-chip clock generation due to their small size and technology portability. Variability tolerance is a key design challenge when designing such PLLs in an advanced CMOS technology. Environmental variations, such as mismatch, p ...

IEEE2017

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This paper presents the design of Wren, a new geo-replicated key-value store that achieves Transactional Causal Consistency. Wren leverages two design choices to achieve higher performance and better scalability than existing systems. First, Wren uses hybr ...

2017

Method and apparatus for low power chip-to-chip communications with constrained ISI ratio

Mohammad Amin Shokrollahi, Ali Hormati

An efficient communications apparatus is described for a vector signaling code to transport data and optionally a clocking signal between integrated circuit devices. Methods of designing such apparatus and their associated codes based on a new metric herei ...

2016

Robustness Analysis of Controllable-Polarity Silicon Nanowire Devices and Circuits

Hassan Ghasemzadeh Mohammadi

Substantial downscaling of the feature size in current CMOS technology has confronted digital designers with serious challenges including short channel effect and high amount of leakage power. To address these problems, emerging nano-devices, e.g., Silicon ...

EPFL2016

Safety requirements for modern automotive electronics call for more and more robust power integrated circuits. The mixed-signal IC design flow alone is often no longer capable of tracking possible design failures in complex Smart Power integrated circuits ...

EPFL2016

Characterization and modeling of nanoscale MOSFET for ultra-low power RF IC design

Maria-Anna Chalkiadaki

The evolution and characteristics of the electronics is directly linked to the technological and societal progress. Today, there is a huge variety of electronic solutions offered, with the RF low-power systems, such as wireless sensor networks, wireless bo ...

EPFL2016

Orthogonal differential vector signaling codes are described which support encoded sub-channels allowing transport of distinct but temporally aligned data and clocking signals over the same transport medium. Embodiments providing enhanced LPDDR interfaces ...

2016

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This paper presents a circuit-level design and analysis of high-data-rate 3D serial vertical links which exploit the high bandwidth provided by TSV technology. As most of the existing TSVs consume a large amount of die area, the serial configuration can sa ...

Elsevier2016