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Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

Publications associées (62)

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A low-power 4-channel hybrid NRZ/multi-tone transceiver for multi-drop bus (MDB) memory interfaces is designed and fabricated in 40 nm CMOS technology. The proposed system achieves 1 pJ/bit power efficiency, while communicating over an MDB channel with 45 ...

Ieee-Inst Electrical Electronics Engineers Inc2016

Signaling in 3-D integrated circuits, benefits and challenges

Somayyeh Rahimian Omam

Three-dimensional (3-D) or vertical integration is a design and packaging paradigm that can mitigate many of the increasing challenges related to the design of modern integrated systems. 3-D circuits have recently been at the spotlight, since these circuit ...

EPFL2015

An Overlap-Contention Free True-Single-Phase Clock Dual-Edge-Triggered Flip-Flop

Andreas Peter Burg, Adam Shmuel Teman, Andrea Bonetti

Dual-edge-triggered (DET) synchronous operation is a very attractive option for low-power, high-performance designs. Compared to conventional single-edge synchronous systems, DET operation is capable of providing the same throughput at half the clock frequ ...

2015

An efficient communications apparatus is described for a vector signaling code to transport data and optionally a clocking signal between integrated circuit devices. Methods of designing such apparatus and their associated codes based on a new metric herei ...

2015

New Data Structures and Algorithms for Logic Synthesis and Verification

Luca Gaetano Amarù

The strong interaction between Electronic Design Automation (EDA) tools and Complementary Metal-Oxide Semiconductor (CMOS) technology contributed substantially to the advancement of modern digital electronics. The continuous downscaling of CMOS Field Effec ...

EPFL2015

The Microloop-Gap Resonator: A Novel Miniaturized Microwave Cavity for Double-Resonance Rubidium Atomic Clocks

Anja Skrivervik, Francesco Merli, Maddalena Violetti

Nowadays mobile and battery-powered applications push the need for radically miniaturized and low-power frequency standards that surpass the stability achievable with quartz oscillators. For the miniaturization of double-resonance rubidium (Rb-87) atomic c ...

Institute of Electrical and Electronics Engineers2014

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GentleRain is a new causally consistent geo-replicated data store that provides throughput comparable to eventual consistency and superior to current implementations of causal consistency. GentleRain uses a periodic aggregation protocol to deter- mine whet ...

ACM2014

Timing Uncertainty in 3-D Clock Trees due to Process Variations and Power Supply Noise

Giovanni De Micheli, Xifan Tang, Vasileios Pavlidis, Hu Xu, Wayne Burleson

Clock distribution networks are affected by different sources of variations. The resulting clock uncertainty significantly affects the frequency of a circuit. To support this analysis, a statistical model of skitter, which consists of clock skew and jitter ...

Institute of Electrical and Electronics Engineers2013

Design Methodologies and CAD for Emerging Nanotechnologies

Shashi Kanth Bobba

With technology scaling reaching the fundamental limits of Si-CMOS in the near future, the semiconductor industry is in quest for innovation from various disciplines of integrated circuit (IC) design. At a fundamental level, technology forms the main drive ...

EPFL2013

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Clock distribution networks consume a considerable portion of the power dissipated by synchronous circuits. In conventional clock distribution networks, clock buffers are inserted to retain signal integrity along the long interconnects, which, in turn, sig ...

American Scientific Publishers2013