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Active Voltage Balancing with Seamless Integration into Dual Gate Driver for Series Connection of SiC MOSFETs

Publications associées (37)

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Dual-channel gate driver is commonly utilized in the industry for accommodating the widespread use of half-bridge power modules. As wide-bandgap devices become increasingly prevalent due to their superior switching characteristics compared with conventiona ...

2024

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The medium-voltage (MV) dual active bridge (DAB) converter with series-connected SiC (S-SiC) MOSFETs is a promising solution for high-power-density isolated dc/dc converter. To improve the voltage sharing and reliability of S-SiC, relatively large snubber ...

Ieee-Inst Electrical Electronics Engineers Inc2024

LiNiO Junction Gate for High-performance Enhancement-mode GaN Power Transistor

Taifang Wang

GaN metal-oxide-semiconductor high electron mobility transistors (MOS)HEMTs) offer outstanding properties for next-generation power electronics devices. The high conductivity, high voltage blocking capability, high operation frequency, and device-level int ...

EPFL2022

The emergence of wide-band-gap (WBG) power transistors with low conduction losses and high-speed switching speeds has paved the way for more-than-ever efficient power electronics systems and huge energy saving potentials. Likewise, power density- the ratio ...

EPFL2021

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For certain field-effect transistors (FETs) in soft-switching operation, the large-signal behavior of their output capacitance ( Co ) has shown to deviate considerably from the datasheet values. This can have a significant effect on hard-switching losses i ...

2021

97.4%-Efficient All-GaN Dual-Active-Bridge Converter with High Step-up High-Frequency Matrix Transformer

Elison de Nazareth Matioli, Armin Jafari, Palliyage Srilak Nirmana Perera

In this work, we demonstrate a state-of-the-art high step-up/down dual-active-bridge (DAB) converter designed with GaN transistors, to achieve a high efficiency and large power-density. A quasi-planar matrix transformer with high step-up/down ratio is demo ...

2020

Negative Resistance in Cascode Transistors

Elison de Nazareth Matioli, Armin Jafari, Palliyage Srilak Nirmana Perera

Cascode topology which includes a high-voltage GaN and a low-voltage Si transistor is an attractive device concept, which uses the low ON-resistance of GaN while still being compatible with Si gate drivers. It demonstrates the highest threshold voltage amo ...

2020

Conventional device scaling has been the main guiding principle of the MOS device engineering over these past years. However, this aggressive scaling would be eventually limited due to the inability to remove the heat generated by MOSFET devices. The power ...

EPFL2019

Measurement of Large-Signal Coss and Coss Losses of Transistors Based on Nonlinear Resonance

Elison de Nazareth Matioli, Armin Jafari, Palliyage Srilak Nirmana Perera

In this letter, we present a new measurement technique to evaluate the large-signal output capacitance ( COSS ) of transistors as well as the COSS energy dissipation ( EDISS ), based on the nonlinear resonance between a known inductor and the output capaci ...

2019

The growth of information technology has been sustained by the miniaturization of Complementary Metal-Oxide-Semiconductor (CMOS) Field-Effect Transistors (FETs), with the number of devices per unit area constantly increasing, as exemplified by Mooreâs la ...

EPFL2019