Design and analysis techniques for dynamic current mirrors

Today's world of electronics becomes more and more digital and therefore CMOS becomes the dominant technology. A CMOS process compared to a bipolar process offers several advantages, mainly a low power consumption which is important for portable systems powered by batteries or for large systems. Another point is the smaller device geometries, which increase the number of gates that can be packed on a single chip. Parallel to the increasing digital domain the analog field persists, because the origin of physical phenomenons and their perception is analog. Electronic sensors perceive these analog events and deliver a corresponding output signal. If this analog signal is not suitable for digital processing some analog preconditioning must be done [YEN82]. Combining both types of signal processing on the same chip to obtain the best possible performances is therefore desirable [MID84]. CMOS technology has led to a wide use of voltages and charge transfers for signal processing. As the feature sizes shrink a lower supply voltage is imposed, which reduces the dynamic voltage range of the circuits. Because process parameters are chosen to optimize digital performances, the analog functional blocks have to adapt themselves to the restricted voltage range. Current mode circuits offer a solution to these problems as they require only a baseline digital process and avoid many of the anticipated low voltage problems by operating in the current domain [HUG89]. Due to the non-linear current-voltage relationship the dynamic range of current-mode signals is larger than that of voltage-mode signals. Therefore the current mode approach can provide attractive and elegant solutions for many circuit and system problems [TOU90]. A ubiquitous elementary building block in most analog integrated circuits is the current mirror which is able to multiply and duplicate an imposed input current, that contains the information (bias or signal). The reproduced output current of is then available for any subsequent processing. Unfortunately, due to random process variations, transistor parameters are affected by a certain variation of the transconductance parameter and of the threshold voltage [SHY84], [LAK86]. Hence, the output currents of transistors which have been designed identically are different. These random variations, the so-called devices mismatch, are a major limitation for most accurate and precise current mode circuit applications. Another main limitation of CMOS circuits is the 1/f flicker noise of the MOS transistors. The standard technique to reduce this 1/f noise and the error due to mismatch is to increase the transistor area and to overwhelm the threshold mismatch with a high gate voltage overhead, which simultaneously increases the saturation voltage of the devices. The performance of a mirror with low saturation voltage can be improved by using lateral bipolar transistors [VIT83]. The resulting current error can be lower than 1%, but the major handicap is that only one type of mirror can be built (source or sink depending on the technology used). Special circuit techniques allow us to reduce the inherent noise and offset in MOS amplifiers, like the chopper technique [HSI81], [ENZ89], and the auto-zero technique [YEN82], [DEG85]. The auto-zero technique is also used to ensure adequate biasing of CMOS inverters or analog-to-digital converters [CAN82]. Dynamic element matching [VdP76] is based on the chopper technique and shifts the error components to higher frequencies. The drawback of this technique is the high residual output ripple, which for most applications must be filtered out by using external components. Furthermore multiple mirrors are difficult to implement. Dynamic analog techniques [VIT85.1] exploit the absence of gate current to temporarily store some analog information on the gate capacitance of the MOS device. A reported application of this analog storage capability is the dynamic comparator [YEE78] which sequentially uses the same transistor as the two devices of a differential pair. With this auto-zero technique the very notion of mismatch disappears. The achievable precision is moved to new limits and depends on the capability of accurately storage the signal, mainly limited by charge injection from the MOS transistors used as switches. Although the idea of current sampling was formulated over ten years ago [OGU78], the first accurate implementation dates from 1988, because the circuit theory and process technology did not allow researchers to obtain the expected results. In the "Electronics Letters" issue of December 1988 [DAU88] published the idea and some simulated results, which induced a series of publications during the year of 1989. Several research laboratories have focused on the subject during the last few years, with the reported results of [GRO89] concerning D/A converters, [NAI89.2] for A/D converters, [HUG89] for current mode circuits and filters, and ourselves [VIT88], [WEG89.1] for dynamic current mirrors. The primary objective being pursued in this dissertation is to investigate the different possibilities, to design and to analyze the performances and limitations of a new type of current mirror, a so-called dynamic mirror or current copier. The goal is to build highly accurate current mirrors in the simplest and most compact way. The best strategy for a given problem can be chosen only if all parameters influencing the circuit performances are known. The outline of this thesis is the following: Chapter 2 presents the principle of memorization of a current copier. The main limitations which influence the achievable accuracy are deduced and cell structures which reduce these effects derived. In Chapter 3 the principle and the different configurations of dynamic current mirrors are extensively described, and their advantages and disadvantages discussed and compared. Possibilities of realizing multiple, multiplying and dividing current mirrors are highlighted. Chapter 4 provides a deeper look at the different parameters, which limit the accuracy of a dynamic current mirror, namely drain voltage variations, leakage currents, noise and charge injection. The sampling of white noise and 1/f noise is analyzed and their contribution calculated. The influence of charge injection is evaluated and the interfering parameters shown. The transient behavior is considered in Chapter 5, where the output spikes and the trade-off between speed and accuracy are highlighted. Chapter 6 emphasizes layout considerations and the practical implementation of a dynamic current mirror. Chapter 7 summarizes the experimental results obtained with such mirrors. Chapter 8 deals with the different possible applications, focusing on a continuous time filter. The principle of D/A & A/D converters and switched current filters are outlined, and the extension to other functional blocs is suggested. Finally Chapter 9 provides summarizing remarks and conclusions.