Related publications (610)

SPAD Developed in 55 nm Bipolar-CMOS-DMOS Technology Achieving Near 90% Peak PDP

Edoardo Charbon, Claudio Bruschini, Ekin Kizilkan, Pouyan Keshavarzian, Won Yong Ha, Francesco Gramuglia, Myung Jae Lee

We present a single-photon avalanche diode (SPAD) developed in 55 nm bipolar-CMOS-DMOS (BCD) technology, which achieves high photon detection probability (PDP) while its breakdown voltage is lower than 20 V. To enhance the PDP performance, the SPAD junctio ...
Ieee-Inst Electrical Electronics Engineers Inc2024

Polarization-enhanced GaN Schottky barrier diodes: Ultra-thin InGaN for high breakdown voltage and low Ron

Elison de Nazareth Matioli, Alessandro Floriduz, Zheng Hao

In this work, we present a concept that leverages the strong piezoelectric polarization field in InGaN, which counteracts the external electric field at reverse bias. We show that despite the smaller InGaN band-gap and lower critical electric field, its st ...
2024

Active Voltage Balancing with Seamless Integration into Dual Gate Driver for Series Connection of SiC MOSFETs

Drazen Dujic

The versatility of half-bridge configuration of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) power module contributes to its widespread adoption, highlighting the popularity and significance of its corresponding dual gat ...
2024

A Dual-Channel Gate Driver Design with Active Voltage Balancing Circuit for Series Connection of SiC MOSFETs

Drazen Dujic

Dual-channel gate driver is commonly utilized in the industry for accommodating the widespread use of half-bridge power modules. As wide-bandgap devices become increasingly prevalent due to their superior switching characteristics compared with conventiona ...
2024

Ripple Voltage and Loss Reduction of Single-Phase ISOP SST by Eliminating the Second Harmonic Current in LLC Converters

Drazen Dujic, Andrea Cervone, Tianyu Wei

In two-stage solid-state transformers with input-series output-parallel structure, the LLC converter operating at a fixed switching frequency is a common choice for the isolated DC/DC conversion stage because it can provide a high efficiency and a fixed vo ...
2024

An Ultralow-Power Triaxial MEMS Accelerometer With High-Voltage Biasing and Electrostatic Mismatch Compensation

Kyojin Choo, Li Xu, Yimai Peng

This article presents a triaxial micro electromechani-cal system (MEMS) capacitive accelerometer using a high-voltage biasing technique to achieve high resolution with ultralow power. The accelerometer system generates a differential pair of high voltages ...
Piscataway2024

Static and Dynamic Voltage Balancing for an IGCT-Based Resonant DC Transformer

Drazen Dujic, Renan Pillon Barcelos, Nikolina Djekanovic

This paper focuses on the operational characteristics of a medium voltage resonant DC transformer based on a split capacitor IGCT 3L-NPC leg. The study delves into both the dynamic and static balancing aspects of the 3L-NPC when operating in a two-level, 5 ...
2024

A pre-fatigue training strategy to stabilize LiCoO2 at high voltage

Lei Zhang, Kangning Zhao, Rui Xia

Layered cathodes are among the most promising cathodes for high-energy-density Li-ion batteries, yet hindered by the structural degradation from both bulk strain and surface oxygen loss at high voltage (above 4.5 V). Herein, we report a pre-fatigue trainin ...
Cambridge2024

Active Power Decoupling for Single-Phase Input-Series-Output-Parallel Solid-State Transformers

Drazen Dujic, Andrea Cervone, Tianyu Wei

Solid-state transformers with input-series outputparallel structures are being considered for a variety of applications requiring MVAC to LVDC conversion. Due to the singlephase AC/DC conversion at the input side, all floating cells of the solid-state tran ...
2024

Doping Engineering for PDP Optimization in SPADs Implemented in 55-nm BCD Process

Edoardo Charbon, Claudio Bruschini, Myung Jae Lee, Feng Liu

We introduce a new family of single-photon avalanche diodes (SPADs) with enhanced depletion regions in a 55-nm Bipolar-CMOS-DMOS (BCD) technology. We demonstrate how to systematically engineer doping profiles in the main junction and in deep p-well layers ...
Piscataway2024

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