Operational amplifier

Summary

An operational amplifier (often op amp or opamp) is a DC-coupled high-gain electronic voltage amplifier with a differential input and, usually, a single-ended output. In this configuration, an op amp produces an output potential (relative to circuit ground) that is typically 100,000 times larger than the potential difference between its input terminals. The operational amplifier traces its origin and name to analog computers, where they were used to perform mathematical operations in linear, non-linear, and frequency-dependent circuits. The popularity of the op amp as a building block in analog circuits is due to its versatility. By using negative feedback, the characteristics of an op-amp circuit, its gain, input and output impedance, bandwidth etc. are determined by external components and have little dependence on temperature coefficients or engineering tolerance in the op amp itself. Op amps are used widely in electronic devices today, including a vast array of consumer, indus

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This research work deals with the design of linear CMOS RF power amplifiers. Two important aspects are treated: efficiency enhancement and frequency-tunable capability. For this purpose, two different integrated circuits were realized in a 0.11 µm technology, each one addressing a different aspect. With respect to efficiency enhancement, a dynamic supply RF power amplifier was realized. The circuit was designed for an operating frequency of 5.2 GHz, but measurements were also performed at 2.4 GHz. The integrated circuit includes a class A amplifier and a high-efficiency, switched-mode modulator. It occupies an area of 1.35 mm2. Two-tone measurement results at 2.4 and 5.2 GHz showed that the system can deliver over 16 dBm (40 mW) linear output power with efficiencies of 22.7% and 12.6%, respectively. Compared to a constant 2.5 V supply operation, the power amplifier operating with the dynamic supply delivers higher linear output power. Moreover, a relative efficiency improvement of a factor of 2.3 at 2.4 GHz and of a factor of 1.6 at 5.2 GHz at low output power levels is achieved. OFDM measurements at 2.4 GHz demonstrated that for an EVM lower than 3% and for an equal output power of 11 dBm (12.6 mW), the absolute improvement in efficiency is over 3.2%. In this work we also propose a tunable impedance matching network for use in multiband RF power amplifiers. This novel network is based on coupled inductors. A frequency-tunable RF power amplifier using this network was designed for operation at 3.7 and 5.2 GHz. Simulation results for the complete system integrated in a CMOS technology showed good results. However, the frequency-tunable behavior could not be observed in the characterization of the integrated circuit because of the low coupling factor of the integrated coupled inductors. A hybrid implementation using the integrated CMOS power amplifier, a discrete commercial RF transformer and a discrete bipolar transistor to control the current in the secondary winding of the transformer was carried out. The circuit was designed for operation at 200 and 300 MHz. The measurements have shown that at 200 MHz a relative improvement in efficiency of a factor of 1.4 was achieved. Moreover, less distortion was generated with the proposed tunable output matching network. The hybrid implementation allowed us to demonstrate the feasibility of the frequency-tunable RF power amplifier based on coupled inductors.

EPFL2009

Progressive mesh decomposition in the operational rate-distortion sense using global error

Laurent Balmelli

2001

It has already been a few years since the first appearance of micro-electromechanical systems (MEMS) in academic research. Since then, a broad number of devices have been designed under this generic term. Bulk-acoustic wave (BAW) resonators are among the few of them which have become exploited at industrial level. They are mainly used to implement filters for mainstream telecommunication applications. In a different domain, potential applications for integrated wireless transceivers are flourishing. While some of them require always higher data rates, others need devices with low data rate but even lower power consumption. The goal of this thesis is to explore ways of using BAW resonators to implement building blocks for such a low-power radio and actually verify the postulate that this could help improving power consumption as well as miniaturize key functionalities. For the active integrated circuit part, the choice of a standard digital 0.18µm CMOS process established itself for its low cost and ubiquity. The specifications for the developed radio receiver are calculated for a physical layer derived from the well known Bluetooth communication protocol in the 2.4GHz ISM band with similar applications scenarii but with much lower data rates and wider channel spacing. After presenting the advantages and limitations of the devices, the implications for using BAWresonators to implement a low-power radio are investigated at circuit and system levels and a super-heterodyne architecture is proposed. A selective low-noise amplifier (LNA) is used at the circuit front-end to yield image and blocker rejection. Measurements for the RF front-end comprising an external balun, the selective LNA, a first downconversionmixer and an intermediate-frequency (IF) amplifier showed an overall noise figure of 11dB for a current consumption of 1.5mA under 1.2V. The high selectivity of the design yields an image rejection ratio of at least 50dB and allows to decrease linearity requirements and thus power consumption. A slightly improved version of the same front-end integrated together with the analog baseband signal processing chain but still using external local oscillators showed sensitivities of -96dBm at 100kbps symbol rate and -93dBm at 200kbps with an external state-of-the art FSK demodulator, allowing to extrapolate a global noise figure of 12.2dB for a global current consumption of 2.3mA under 1.2V. The proposed solution for the frequency synthesis uses both a BAW oscillator for the first downconversion to IF and a quadrature quasi-harmonic relaxation oscillator to translate the signals to baseband. The relaxation oscillator is embedded within a phase-locked loop (PLL) for which all the required blocks are discussed. Particularly, a novel modular multi-modulus frequency divider is presented, which does not necessitate complicated logic to yield the wanted division ratio and uses dynamic logic. The necessary digital circuitry to control the frequency generation is discussed as well. Finally, measurements for the complete receiver using the proposed frequency synthesis as well as digital control and demodulator implemented on FPGA are presented.

EPFL2008

EPFL2009