Concept

Timer

Related publications (5)

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Dataflow process networks provide a versatile model of computation for specifying signal processing applications in a platform independent fashion. This attractive feature of dataflow has lately been realized in dataflow programming tools that allow synthe ...

Ieee-Inst Electrical Electronics Engineers Inc2015

An Enhanced Design Methodology for Resonant Clock Trees

Giovanni De Micheli, Xifan Tang, Vasileios Pavlidis, Somayyeh Rahimian Omam

Clock distribution networks consume a considerable portion of the power dissipated by synchronous circuits. In conventional clock distribution networks, clock buffers are inserted to retain signal integrity along the long interconnects, which, in turn, sig ...

American Scientific Publishers2013

Low-power clock distribution networks for 3-D ICs

Giovanni De Micheli, Vasileios Pavlidis, Somayyeh Rahimian Omam

Designing a low power clock network in synchronous circuits is an important task. This requirement is stricter for 3-D circuits due to the increased power densities. Resonant clock networks are considered efficient low-power alternatives to conventional cl ...

2012

Design of Resonant Clock Distribution Networks for 3-D Integrated Circuits

Giovanni De Micheli, Vasileios Pavlidis, Somayyeh Rahimian Omam

Springer-Verlag2011

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What is the influence of sand grain shapes on an hourglass accuracy, and how does it affect the jamming probability? We study such a question using numerical simulation and our recently introduced spheropolyhedral particles. Spheropolyhedra constitute a ve ...

AIP2009

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