Publications related to Magnetic-core memory

Vertical versus lateral tunneling FET non-volatile memory cell

Mihai Adrian Ionescu, Saurabh Tomar, Arnab Biswas

This work reports a comparison of high-k AbO(3)/HfO2/Al2O3 dielectric stack Tunnel FETs with both vertical tunneling and lateral tunneling, as non-volatile memory (NVM) cells. Tunnel FET NVM are fabricated and characterized to evaluate their potential as l ...

IEEE2016

Accurate Power Analysis for Near-Vt RRAM-based FPGA

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang

Resistive Random Access Memory (RRAM)-based FPGA architectures employ RRAMs not only as memories to store the configuration but embed them in the datapaths of programmable routing resources to propagate signals with improved performances. Sources of ...

2015

Low-Voltage Read/Write Circuit Design for Transistorless ReRAM Crossbar Arrays in 180nm CMOS Technology

Davide Sacchetto, Yusuf Leblebici, Jury Sandrini, Tugba Demirci, Maxime Victor Thammasack

This paper presents a read-write design solution for passive ReRAM crossbar memory arrays to overcome the sneak current paths problem. The proposed circuitry includes an auto-calibration feature to overcome the sneak current effects during the READ operati ...

2015

PCM for Neuromorphic Applications: Impact of Device Characteristics on Neural Network Performance

Yusuf Leblebici, Irem Boybat Kara, Severin Sidler, Carmelo Di Nolfo

The impact of Phase Change Memory (PCM) as well as other Non-Volatile Memory (NVM) device characteristics on the quantitative classification performance of artificial neural networks is studied. Our results show that any NVM-based neural network — not just ...

2015

Refresh-Free Dynamic Standard-Cell Based Memories: Application to a QC-LDPC Decoder

Andreas Peter Burg, Pascal Andreas Meinerzhagen, Georgios Karakonstantis, Andrea Bonetti

The area and power consumption of low-density parity check (LDPC) decoders are typically dominated by embedded memories. To alleviate such high memory costs, this paper exploits the fact that all internal memories of a LDPC decoder are frequently updated w ...

2015

Approximate Computing With Unreliable Dynamic Memories

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Georgios Karakonstantis, Shrikanth Ganapathy

Embedded memories account for a large fraction of the overall silicon area and power consumption in modern SoC(s). While embedded memories are typically realized with SRAM, alternative solutions, such as embedded dynamic memories (eDRAM), can provide highe ...

2015

A Fast Modular Method for True Variation-Aware Separatrix Tracing in Nanoscaled SRAMs

Adam Shmuel Teman

As memory density continues to grow in modern systems, accurate analysis of SRAM stability is increasingly important to ensure high yields. Traditional static noise margin metrics fail to capture the dynamic characteristics of SRAM behavior, leading to exp ...

Institute of Electrical and Electronics Engineers2015

Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element

Irem Boybat Kara, Severin Sidler, Carmelo Di Nolfo

Using two phase-change memory devices per synapse, a three-layer perceptron network with 164 885 synapses is trained on a subset (5000 examples) of the MNIST database of handwritten digits using a backpropagation variant suitable for nonvolatile memory (NV ...

Ieee-Inst Electrical Electronics Engineers Inc2015

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Magnetic-core memory

Vertical versus lateral tunneling FET non-volatile memory cell

Multilevel-cell phase-change memory

Accurate Power Analysis for Near-Vt RRAM-based FPGA

Low-Voltage Read/Write Circuit Design for Transistorless ReRAM Crossbar Arrays in 180nm CMOS Technology

Tunnel Field Effect Transistors

PCM for Neuromorphic Applications: Impact of Device Characteristics on Neural Network Performance

Refresh-Free Dynamic Standard-Cell Based Memories: Application to a QC-LDPC Decoder

Approximate Computing With Unreliable Dynamic Memories

A Fast Modular Method for True Variation-Aware Separatrix Tracing in Nanoscaled SRAMs

Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element

Graph Chatbot

Chat with Graph Search

PCM for Neuromorphic Applications: Impact of Device Characteristics on Neural Network Performance

A Fast Modular Method for True Variation-Aware Separatrix Tracing in Nanoscaled SRAMs

Multilevel-cell phase-change memory

Vertical versus lateral tunneling FET non-volatile memory cell

Accurate Power Analysis for Near-Vt RRAM-based FPGA

Tunnel Field Effect Transistors

Low-Voltage Read/Write Circuit Design for Transistorless ReRAM Crossbar Arrays in 180nm CMOS Technology

Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element

Approximate Computing With Unreliable Dynamic Memories

Refresh-Free Dynamic Standard-Cell Based Memories: Application to a QC-LDPC Decoder