Concept

Voltage multiplier

Related publications (375)

Characterization and Modeling of Mismatch in Cryo-CMOS

This paper presents a device matching study of a commercial 40-nm bulk CMOS technology operated at cryogenic temperatures. Transistor pairs and linear arrays, optimized for device matching, were characterized over the temperature range from 300 K down to 4 ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Development of an inorganic cesium carbonate-based electron transport material for a 17% power conversion efficiency perovskite solar cell device

Mohammad Khaja Nazeeruddin, Iwan Zimmermann, Brahim Aissa

A low-temperature solution process technique is employed to develop an inorganic cesium carbonate (Cs2CO3) as an electron transport material for inorganic-organic hybrid double cation (FAPbI(3))(0.85)(MAPbBr(3))(0.15) perovskite solar cells, as an alternat ...

2020

Vapor-assisted deposition of highly efficient, stable black-phase FAPbI(3) perovskite solar cells

Shaik Mohammed Zakeeruddin, David Lyndon Emsley, Ursula Röthlisberger, Wolfgang Richard Tress, Felix Thomas Eickemeyer, Yuhang Liu, Haizhou Lu, Likai Zheng, Ulf Anders Hagfeldt, Xiong Li, Zaiwei Wang, Fan Fu, Paramvir Ahlawat, Aditya Mishra, Claudia Esther Avalos, Brian Irving Carlsen, Xianfu Zhang, Anand Agarwalla, Ying Yang

Mixtures of cations or halides with FAPbI(3) (where FA is formamidinium) lead to high efficiency in perovskite solar cells (PSCs) but also to blue-shifted absorption and long-term stability issues caused by loss of volatile methylammonium (MA) and phase se ...

AMER ASSOC ADVANCEMENT SCIENCE2020

Four Quadrant Bus-Tie Switch for Protection of Shipboard Power Systems

Drazen Dujic, Gabriele Ulissi

The desire to increase the voltage of DC shipboard power distribution networks to the medium voltage level derives from the pressure to reduce the operating costs of such systems by increasing their efficiency. Solid state bus-tie switches are accepted to ...

2020

Four Quadrant Bus-Tie Switch for Protection of Shipboard Power Systems

Drazen Dujic, Gabriele Ulissi

IEEE2020

Free Carrier Mobility, Series Resistance, and Threshold Voltage Extraction in Junction FETs

Jean-Michel Sallese, Farzan Jazaeri, Matthias Bucher

In this brief, extraction methods are proposed for determining the essential parameters of double gate junction field-effect transistors (FETs). First, a novel method for determining free carrier effective mobility, similar to a recently proposed method fo ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Influence of the Subcell Properties on the Fill Factor of Two-Terminal Perovskite-Silicon Tandem Solar Cells

Christophe Ballif, Mathieu Gérard Boccard

The performance of a tandem solar cell depends on the performance of its constituting subcells. Although this dependency is theoretically straightforward for open-circuit voltage (V-oc) and short-circuit current, it is indirect for fill factor (FF) and thu ...

AMER CHEMICAL SOC2020

A cost-device efficiency balanced spiro based hole transport material for perovskite solar cells

Mohammad Khaja Nazeeruddin

Although spiro-MeOTAD 1 is a superior hole-transporting material (HTM) commonly employed in perovskite solar cells (PSC), its high cost is one of the major issues holding back commercialization, which has not been resolved to-date. In this article we intro ...

ROYAL SOC CHEMISTRY2020

Investigation of p-GaN tri-Gate normally-Off GaN Power MOSHEMTs

Elison de Nazareth Matioli, Jun Ma, Minghua Zhu

In this work, we present the investigation of the combination of p-GaN gate and tri-gate structures to achieve normally-off operation on GaN-on-Si MOSFETs. We have developed and optimized a selective and low-damage p-GaN etching recipe to stop at the AlGaN ...

IEEE2020

Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures

Edoardo Charbon, Fabio Sebastiano

Cryogenic device models are essential for the reliable design of the cryo-CMOS electronic interface necessary to build future large-scale quantum computers. This paper reports the characterization of the drain-current mismatch of NMOS and PMOS devices fabr ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

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