Semicustom RTL Design: Frontend with Synthesis

In course

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Description

This lecture covers the fundamentals of VLSI design, focusing on the semi-custom design flow from RTL description to gate level, synthesis, and physical design. Topics include RTL design, timing constraints, synthesis scripts, clock tree constraints, power planning, and technology files.

Instructor

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Official source

https://mediaspace.epfl.ch/media/0_eb1a0pb3

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Ontological neighbourhood

Computer engineering

Hardware engineering: Application-specific integrated circuit

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