Semicustom RTL Design: Frontend with Synthesis

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Interconnect / Wires

Explores the evolution and importance of interconnect technologies in VLSI design, focusing on wire geometries and capacitance.

Floorplanning and Layout

Covers the basics of floorplanning and layout for digital full custom design in advanced VLSI, emphasizing efficient design strategies.

Timing Analysis: Synchronous Circuit Design

Covers timing analysis of synchronous circuits, focusing on flip-flops, timing constraints, and metastability issues.

Logic Gates and IC Technology

Explores the implementation of logic gates in semiconductor material, focusing on TTL and CMOS technologies, ICs, hazards, clocks, D flip-flops, and switch debouncing.

Digital Logic Circuits: Memory and Decoder Fundamentals

Provides an overview of digital logic circuits, focusing on memory systems and binary decoders, including their operation and access protocols.

Digital Design: Lowerbounds and Recommendations

Covers abstraction levels, EPFL design flow, lowerbounds, and layout recommendations.

Test Environment Setup

Covers the setup of a test environment for VLSI design.

Automatic Optimization of Arithmetic Circuits

Explores automatic optimization of arithmetic circuits, addressing challenges in restructuring circuits for improved efficiency and performance.

Complex Gates: Exercise-2 Solution

Covers the design of complex logic gates in VLSI.

Test of VLSI Systems

Covers test techniques for digital VLSI systems, including fault modeling and design for testability.