Explores the implementation of logic gates in semiconductor material, focusing on TTL and CMOS technologies, ICs, hazards, clocks, D flip-flops, and switch debouncing.
Provides an overview of the technology behind logic gates, covering TTL and CMOS families and addressing static and dynamic hazards, gated clocks, and switch debouncing.
Introduces Dynamic Logic, covering its principles, issues, and design variations, including footed vs. unfooted designs and multiple-output structures.