Lecture
This lecture introduces the concept of Programmable Logic Devices (PLDs) focusing on Generic Array Logic (GAL) and Complex Programmable Logic Device (CPLD). It covers the evolution from Application Specific Integrated Circuits (ASICs) to PAL, GAL, and CPLD technologies. The instructor explains the structure and advantages of PAL, the limitations of GAL technology, and the emergence of CPLDs to handle the increasing complexity of digital systems. The lecture details the architecture of GAL, the programming cycles, and data retention limitations. It also discusses the macro-cell structure in CPLDs and the role of the routing array. Additionally, it explores the Input Output Block (IOB) in CPLDs for managing external connectivity.