Optimization of the Averaging Reliability Technique using Low Redundancy Factors for Nanoscale Technologies

This paper presents a method enabling the evaluation of the averaging fault-tolerant technique, using the output probability density functions (PDFs) of unreliable units which are acquired from Monte Carlo simulations. The method has been verified by comparing numerical simulations and analytical developments. A fault-tolerant four-layer architecture using averaging and with both fixed and adaptable threshold is compared with triple and R-fold modular redundancy techniques, at gate level and using fault-free decision gates, showing that the redundancy factor can be reduced by a factor of two to three using the proposed four-layer architecture, in replacement of R-fold modular redundancy, thus enabling significant savings in the area, and power dissipation. The analysis of the reliability of averaging techniques together with the redundancy optimization has been performed for the first time in the context of a large-scale system, showing that a target reliability can be achieved with low redundancy factors ({R