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Modeling of Cd Uptake and Efflux Kinetics in Metal-Resistant Bacterium Cupriavidus metallidurans

Related publications (33)

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Doping Engineering for PDP Optimization in SPADs Implemented in 55-nm BCD Process

Edoardo Charbon, Claudio Bruschini, Myung Jae Lee, Feng Liu

We introduce a new family of single-photon avalanche diodes (SPADs) with enhanced depletion regions in a 55-nm Bipolar-CMOS-DMOS (BCD) technology. We demonstrate how to systematically engineer doping profiles in the main junction and in deep p-well layers ...

Piscataway2024

Berry curvature dipole generation and helicity-to-spin conversion at symmetry-mismatched heterointerfaces

Peng Chen, Xupeng Yang

The Berry curvature dipole (BCD) is a key parameter that describes the geometric nature of energy bands in solids. It defines the dipole-like distribution of Berry curvature in the band structure and plays a key role in emergent nonlinear phenomena. The th ...

NATURE PORTFOLIO2023

Enhancement-mode Multi-channel AlGaN/GaN Transistors with LiNiO Junction Tri-Gate

Elison de Nazareth Matioli, Luca Nela, Taifang Wang

Multi-channel GaN power device, consisting of stacking multiple two-dimensional-electron-gas (2DEG) channels, has been demonstrated to achieve unprecedented on-state performance while maintaining high breakdown voltage (VBR). However, the large carrier den ...

2022

Hydrogenated amorphous silicon (a-Si:H) can be produced by plasma-enhanced chemical vapor deposition (PECVD) of SiH4 (silane) mixed with hydrogen. The resulting material shows outstanding radiation hardness properties and can be deposited on a wide variety ...

2021

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Two-dimensional/two-dimensional (2D/2D) heterojunctions form one of the most versatile technological solutions for building tunneling field effect transistors because of the sharp and potentially clean interfaces resulting from van der Waals assembly. Seve ...

NATURE PUBLISHING GROUP2020

Double gate n-type WSe2 FETs with high-k top gate dielectric and enhanced electrostatic control

Mihai Adrian Ionescu, Emanuele Andrea Casu, Matteo Cavalieri, Nicolò Oliva

We propose and experimentally demonstrate double-gated n-type WSe 2 FETs with excellent top gate high-k dielectric layer. Under back gate control, the devices behave as n-type enhancement transistors, with ON/OFF current ratios larger than 6 orders of magn ...

IEEE2018

A Design-oriented Charge-based Simplified Model for FDSOI MOSFETs

Christian Enz, Farzan Jazaeri, Alessandro Pezzotta, Louis Hutin

In this paper a design-oriented model for asymmetrical double-gate (ADG) MOSFETs is proposed. Including the back-gate effect into the original simplified EKV bulk model requires only one additional parameter to the existing four, and extends the simplified ...

2018

Transconductance efficiency (g(m)/I-D) is an essential design synthesis tool for low-power analog and RF applications. In this paper, the invariance of g(m)/I-D versus normalized drain current curve is analyzed in an asymmetric double-gate (DG) fully deple ...

2018

Flexible Zinc-Tin Oxide Thin Film Transistors Operating at 1 kV for Integrated Switching of Dielectric Elastomer Actuators Arrays

Danick Briand, Herbert Shea, Samuel Rosset, Alexandre Poulin, Alexis Pierre Henri Marette, Nadine Besse

Flexible high-voltage thin- lm transistors (HVTFTs) operating at more than 1 kV are integrated with compliant dielectric elastomer actuators (DEA) to create a exible array of 16 independent actuators. To allow for high-voltage operation, the HVTFT implemen ...

Wiley-Blackwell2017

Ultra-Thin Body and Box (UTBB) Fully-depleted Silicon-on-Insulator (FDSOI) MOSFETs exhibit very high transit frequency granting advantageous RF and low-power circuits design. This requires accurate models describing transistor behavior in all operating reg ...

IEEE2016