In this paper we report the fabrication and detailed electrical characterization of a ferroelectric transistor (Fe-FET) aiming at the extraction of its physical threshold voltage. The investigated transistors are fabricated on doped bulk silicon with a gate stack including 10 nm silicon dioxide, 40 nm P(VDF-TrFE) and Au. Based on capacitive measurements, a capacitive divider circuit and a long-channel MOSFET model, we subsequently extract the surface potential psi(S) dependence on the gate voltage and the physical threshold voltage. The experimental data suggest a more abrupt d psi(S)/dV(g) slope, compared with a conventional transistor. A hysteretic behavior, due to the polarization of the P(VDF-TrFE), is observed in the psi(S)-V-g characteristics. (C) 2009 Elsevier B.V. All rights reserved.
Mihai Adrian Ionescu, Igor Stolichnov, Ali Saeidi, Teodor Rosca, Matteo Cavalieri
Mihai Adrian Ionescu, Farzan Jazaeri, Ali Saeidi, Benjamin Paul Johanès Gabriel Lambert, Sadegh Kamaei Bahmaei, Matteo Cavalieri, Nicolò Oliva, Amin Rassekh