Real-time high-sensitivity impedance measurement interface for tethered BLM biosensor arrays
Related publications (38)
Graph Chatbot
Chat with Graph Search
Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.
DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.
In practice, some differences are usually observed between computer simulation and experimental results of a chaotic circuit. In this paper, it is tried to obtain computer simulation results having more correlation with those obtained in practice by using ...
A tunable and self-regulating on-chip carbon nanotube based mass balance is presented for small-size and low-cost environmental and healthcare applications. Tube stretching and a phase-locked loop topology make the system widely universal and invariant to ...
An adaptive system for the suppression of vibration transmission using a single piezoelectric actuator shunted by a negative capacitance circuit is presented. It is known that by using a negative-capacitance shunt, the spring constant of a piezoelectric ac ...
This paper presents a preliminary work on the feeding of an AC dipole using a resonant circuit with a varying resonant frequency. A single phase LC oscillator containing a variable capacitor is fed by a wide band amplifier or a voltage source inverter. For ...
Institute of Electrical and Electronics Engineers2011
The system (20) has a switching unit (T1) adapted for switching reversibly between two configurations. A capacitor is connected in series between a secondary winding (9) and a connection terminal (A) in one of the configurations. Another capacitor is conne ...
An 8b 1.2 GS/s single-channel Successive Approximation Register (SAR) ADC is implemented in 32 nm CMOS, achieving 39.3 dB SNDR and a Figure-of-Merit (FoM) of 34 fJ per conversion step. High-speed operation is achieved by converting each sample with two alt ...
Institute of Electrical and Electronics Engineers2013
In the past decades, two recording tools have established themselves as the working horses in the field of electrophysiological cell research: the microelectrode array (MEA) and the optical fluorescence imaging. The former is a grid of miniature electrodes ...
This paper deals with 24-GHz circuits developed by exploiting a system-in-package approach. In order to reduce the cost as much as possible, a standard multilayer printed circuit board (PCB) technology has been adopted. Such a circuit consists of a package ...
Institute of Electrical and Electronics Engineers2012
Neural networks (NNs) implemented at the transistor level are powerful adaptive systems. They can perform hundreds of operations in parallel but at the expense of a large number of building blocks. In the case of analog realization, an extremely low chip a ...
Institute of Electrical and Electronics Engineers2011
New generations of wireless communication systems require linear efficient RF power amplifiers (PAs) for higher transmission data rates and longer battery life. On the contrary, conventional PAs are normally designed for peak efficiency under maximum outpu ...