Tunnel FET with non-uniform gate capacitance for improved device and circuit level performance
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Defects in MOSFET oxides are a major issue in CMOS technologies, affecting not only the device electrical performances but also compromising reliability and endurance. Using Charge-Pumping and C-V measurements, defects have been characterized in native and ...
This article presents a novel approach for implementing ultra-low power digital components and systems using source-coupled logic (SCL) circuit topology, operating in weak inversion (sub-threshold) regime. PMOS transistors with shorted drain-substrate cont ...
This paper addresses the challenges and opportunities offered by post-CMOS devices in terms of new functionality and ultra low power. It focuses on the illustration of: (i) the quest for the new electronic abrupt switches (tunnel-FET and IMOS/PIMOS) and (i ...
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The aim of this research is to develop and to evaluate devices and circuits performances based on ultrathin nanograin polysilicon wire (polySiNW) dedicated to room temperature operated hybrid CMOS-"nano" integrated circuits. The proposed polySiNW device is ...
Wireless communication systems and handset devices are showing a rapid growth in consumer and military applications. Applications using wireless communication standards such as personal connectivity devices (Bluetooth), mobile systems (GSM, UMTS, WCDMA) an ...
Main stream bulk CMOS and the variants of silicon-on-insulator (SOI) CMOS technologies are discussed with respect to testing for the quiescent current of mixed-signal integrated SOI circuits. The 2-3 times lower static power consumption in fully depleted C ...
Today's world of electronics becomes more and more digital and therefore CMOS becomes the dominant technology. A CMOS process compared to a bipolar process offers several advantages, mainly a low power consumption which is important for portable systems po ...
In this paper the advantages of using Differential Cascode Voltage Switch Pass Gate (DCVSPG) logic with regard to standard CMOS for subthreshold operation are presented. The two families are compared in terms of their performance and Energy-Delay-Product ( ...
Tuning and high frequency capabilities and dynamic range performance of continuous-time oscillators and filters, using the weak inversion operation mode of a low-cost conventional 0.5 μm CMOS technology and multi-tanh linearisation technique are examined. ...
The quickening pace of the MOSFET technology scaling has pushed the MOSFET dimension towards 10 nanometer channel length, where it is going to face the following fundamental and performance limiting factors: (i) electrostatic limits, (ii) source to drain t ...