Design of a Passive UHF RFID Tag for Capacitive Sensor Applications

In this work, the design of a passive UHF RFID tag for sensor applications is described. The system level design issues are discussed taking into account the possible operation scenarios. Among the blocks in the tag, the emphasis is on the design of the rectifier and the capacitive sensor interface. The three-stage, differential-input rectifier is designed to generate the supply voltage with input levels as low as -13 dBm. The power conversion efficiency of the rectifier is 70%, driving a 30 k Omega load at -13 dBm source power. The fully-digital capacitive sensor interface designed to operate with a humidity sensor, can work with supply voltages as low as 0.8 V with good linearity and a power consumption of 12 mu W. The tag is capable of getting linear sensor readout under input power levels as low as -9 dBm. The circuits are implemented in 0.18 mu m UMC CMOS process.

Catherine Dehollain, Kerem Kapucu

In this work, the design of a passive UHF RFID tag for sensor applications is described. The system level design issues are discussed taking into account the possible operation scenarios. Among the blocks in the tag, the emphasis is on the design of the rectifier and the capacitive sensor interface. The three-stage, differential-input rectifier is designed to generate the supply voltage with input levels as low as -13 dBm. The power conversion efficiency of the rectifier is 70%, driving a 30 kΩ load at -13 dBm source power. The fully-digital capacitive sensor interface designed to operate with a humidity sensor, can work with supply voltages as low as 0.8 V with good linearity and a power consumption of 12 μW. The tag is capable of getting linear sensor readout under input power levels as low as -9 dBm. The circuits are implemented in 0.18 μm UMC CMOS process.

IEEE2013

Adaptation dynamique de la compression d'un amplificateur RF pour des signaux modulés en amplitude et en phase

Conventional RF power amplifiers usually give their maximum efficiency near the maximum output power level. When the output power decreases, the efficiency drops sharply. Deep class AB or B PAs improve their efficiency by a self-adaptation of the current drawn from the power supply. However, in many cases, both deep class AB and B do not provide enough linearity like, for instance, in CDMA applications where spectral re-growth is of first concern. From class A to class B, RF PAs face the linearity-efficiency trade-off. The class A is linear but power inefficient, whereas class B is efficient but has a poor linearity. An alternative to the linearity-efficiency trade-off is to dynamically adapt the power supply voltage of a linear PA with respect to the instantaneous envelope value of the modulating signal. The linear PA is of class A or class AB and its collector or drain voltage is adapted to avoid RF output voltage to saturate such that, ideally, the linearity is not degraded. The supply voltage adaptation should be capable to follow large envelope bandwidth for CDMA application (3.8MHz for UMTS and 1.2MHz for IS-95). This thesis work treats System and modulator design aspects. System aspects covers mainly the PA bias influence on the system linearity and system simulation issues. The modulator design covers the architecture aspect to address bandwidth and efficiency requirements and the design in a CMOS 0.35µm process. The modulator is a fast high efficiency step down converter providing all necessary functions to transform the main power supply according to the low envelope detected level into a varying supply for an external PA. The typical carrier frequency is around 1900MHz with a typical minimum level of 100µW whereas the PA power consumption is in the order of a couple of hundred milliwatts.

EPFL2004

Analysis and optimization of passive UHF RFID systems

Jari-Pascal Curty

Radio Frequency IDentification (RFID) is an automatic identification method, relying on storing and remotely retrieving data using devices called RFID tags or transponders. An RFID tag is a small object that can be attached to or incorporated into a product, animal or person. RFID tag contains antenna to enable it to receive and respond to Radio-Frequency (RF) queries from an RFID reader or interrogator. Passive tags require no internal power source, whereas active tags require a power source. As of today (2005), the ubiquitous computing and ambient intelligence ideas are making their way. In order for these to become a reality, a number of key technologies are required. Briefly, these technologies need to be sensitive, responsive, interconnected, contextualised, transparent and intelligent. RFID is such a technology and more particularly passive RFID tags. But, in order to deliver the necessary characteristics that could trigger ambient intelligence, there are some challenges that need to be addressed. Remote powering of the tags is probably the most important. Issues concerning the antenna-tag interface, as well as the rectifier design, that allows the RF signal to be converted to Direct Current (DC) are in pole position. Secondly, the communication link and the reader should be optimized. The RF signal that contains the tag data suffers from a power of four decay with the distance between tag and reader. As a result, both the reader sensitivity and the tag backscattered power efficiency have to be maximized. Long-range powering, as well as sufficient communication quality, are the guidelines of this work. This research project proposes a linear two-port model for an N-stage modified-Greinacher full wave rectifier. It predicts the overall conversion efficiency at low power levels where the diodes are operating near their threshold voltage. The output electrical behavior of the rectifier is calculated as a function of the received power and the antenna parameters. Moreover, the two-port parameters values are computed for particular input voltages and output currents for the complete N-stage rectifier circuit using only the measured I-V and C-V characteristics of a single diode. Also presented in this work is an experimental procedure to measure how the impedance modulation at the tag side affects the signal at the reader. The method allows the tag designer to efficiently predict the effect of modulator design at system level and gives an useful instrument to choose the most appropriate impedances. Finally, the design of a fully integrated remotely powered and addressable RFID tag working at 2.45 GHz is described. The achieved operating range at 4 W Effective Isotropically Radiated Power (EIRP) reader transmit power is 12 m. The Integrated Circuit (IC) is implemented in a 0.5 μm silicon-on-sapphire technology. A state of the art rectifier design achieving 37% of global efficiency is embedded to supply energy to the transponder. Inductive matching and a folded-dipole antenna are key elements to achieve these performances. The necessary input power to operate the transponder is about 2.7 μW.

EPFL2006

Analysis and optimization of passive UHF RFID systems

Jari-Pascal Curty

EPFL2006