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Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure

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Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure

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Performance improvement of chip-level CMOS-integrated ReRAM cells through material optimization

Phasor-based widefield FLIM using a gated 512×512 single-photon SPAD imager

A 0.5 V 2.5 mu W/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13 nW/kB SRAM Retention in 55 nm Deeply-Depleted Channel CMOS

Voltage References for the Ultra-Wide Temperature Range from 4.2 K to 300 K in 40-nm CMOS

Fast-switching Tri-Anode Schottky Barrier Diodes for monolithically integrated GaN-on-Si power circuits

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

Resistive random access memory based multiplexers and field programmable gate arrays

Computer Algebraic Approach to Verification and Debugging of Galois Field Multipliers

A Timing-Monitoring Sequential for Forward and Backward Error-Detection in 28 nm FD-SOI

Performance improvement of chip-level CMOS-integrated ReRAM cells through material optimization

Fast-switching Tri-Anode Schottky Barrier Diodes for monolithically integrated GaN-on-Si power circuits

Phasor-based widefield FLIM using a gated 512×512 single-photon SPAD imager

Resistive random access memory based multiplexers and field programmable gate arrays

Computer Algebraic Approach to Verification and Debugging of Galois Field Multipliers

A 0.5 V 2.5 mu W/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13 nW/kB SRAM Retention in 55 nm Deeply-Depleted Channel CMOS

Voltage References for the Ultra-Wide Temperature Range from 4.2 K to 300 K in 40-nm CMOS

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

A Timing-Monitoring Sequential for Forward and Backward Error-Detection in 28 nm FD-SOI