Performance improvement of chip-level CMOS-integrated ReRAM cells through material optimization
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We present an all-digital application specific integrated circuit (ASIC) that implements Bluetooth Low Energy (BLE)-compatible backscatter communication. The ASIC was fabricated in a 65 nm CMOS process and occupies an active area of 0.12 mm(2) while consum ...
The growth of information technology has been sustained by the miniaturization of Complementary Metal-Oxide-Semiconductor (CMOS) Field-Effect Transistors (FETs), with the number of devices per unit area constantly increasing, as exemplified by Mooreâs la ...
Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...
Ferroelectric materials are explored for numerous applications thanks to their properties associated with electrically switchable spontaneous polarization. Perovskites are an established class of ferroelectrics used for sensors and actuators. However, they ...
Resistive Random Access Memories (ReRAMs) have been researched intensively in the last past decades as a promising alternatives technology for the next-generation non-volatile memory (NVM) devices. ReRAMâs excellent performance properties such as high sw ...
This article presents the design of a front-end circuit for monolithic active pixel sensors (MAPSs). The circuit operates with a sensor featuring a small, low-capacitance (
Piscataway2023
Ferroelectric materials offer a broad range of application-relevant properties, including spontaneous polarization switchable by electric field. Archetypical representatives of this class of materials are perovskites, currently used in applications ranging ...
The revolution of information-technology owes to silicon-based complementary-metal-oxide (CMOS) technology. However, CMOS technology approaches its physical limitation hardening the further progress of memory devices as well as computing paradigm requiring ...
We report on the world's first back-illuminated 3D-stacked single-photon avalanche diode (SPAD) in 45nm CMOS technology. This SPAD achieves a dark count rate of 55.4cps/μm 2 , a maximum photon detection probability of 31.8% at 600nm, over 5% in the 420-920 ...
With the continuous scaling of CMOS technology, integrating an embedded high-density non-volatile memory appears to be more and more costly and technologically challenging. Beyond floating-gate memory technologies, bipolar resistive random access memories ...