Publication

Fluorescence lifetime imaging with a single-photon SPAD array using long overlapping gates: an experimental and theoretical study

Related publications (32)

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

EPFL2024

Further Results on Efficient Implementations of Block Cipher Linear Layers

Subhadeep Banik

At the FSE conference of ToSC 2018, Kranz et al. presented their results on shortest linear programs for the linear layers of several well known block ciphers in literature. Shortest linear programs are essentially the minimum number of 2-input xor gates r ...

2021

Three-Input Gates for Logic Synthesis

Giovanni De Micheli, Mathias Soeken, Dewmini Sudara Marakkalage, Eleonora Testa, Heinz Riener

Most logic synthesis algorithms work on graph representations of logic functions with nodes associated with arbitrary logic expressions or simple logic functions and iteratively optimize such graphs. While recent multilevel logic synthesis efforts focused ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Mirjana Stojilovic, Hossein Asadi, Zeinab Seifoori

Despite FPGAs rapidly evolving to support the requirements of the most demanding emerging applications, their high static power consumption, concentrated within the routing resources, still presents a major hurdle for low-power applications. Augmenting the ...

2021

Reconfigurable Logic Gates Based on Programable Multistable Mechanisms

Simon Nessim Henein, Hubert Pierre-Marie Benoît Schneegans, Ilan Vardi, Mohamed Gamal Abdelrahman Ahmed Zanaty

Binary logic gates are building blocks of computing machines, in particular, electronic computers. One variant is the programable logic gate, also known as the reconfigurable logic gate, in which the logical function implemented can be modified. In this pa ...

ASME2020

Wide-field time-gated SPAD imager for phasor-based FLIM applications

Edoardo Charbon, Claudio Bruschini, Ivan Michel Antolovic, Andrei Ardelean, Arin Can Ülkü

We describe the performance of a new wide area time-gated single-photon avalanche diode (SPAD) array for phasor-FLIM, exploring the effect of gate length, gate number and signal intensity on the measured lifetime accuracy and precision. We conclude that th ...

IOP2020

Wide-Field Time-Gated SPAD Imager for Phasor-Based FLIM Applications

Edoardo Charbon, Claudio Bruschini, Ivan Michel Antolovic, Andrei Ardelean, Arin Can Ülkü

We describe the performance of a new wide area time-gated single-photon avalanche diode (SPAD) array for phasor-FLIM, exploring the e!ect of gate length, gate number and signal intensity on the measured lifetime accuracy and precision. We conclude that the ...

2020

More Results on Shortest Linear Programs

Subhadeep Banik

2019

Scaling-up ESOP Synthesis for Quantum Compilation

Giovanni De Micheli, Mathias Soeken, Bruno Schmitt Antunes

Today's rapid advances in quantum computing hardware call for scalable synthesis methods to map combinational logic represented as multi-level Boolean networks (e.g., an and inverter graph, AIG) to quantum circuits. Such synthesis process must yield revers ...

IEEE2019

Phasor-based widefield FLIM using a gated 512×512 single-photon SPAD imager

Edoardo Charbon, Claudio Bruschini, Ivan Michel Antolovic, Arin Can Ülkü

Single-photon avalanche diode (SPAD) imagers can perform fast time-resolved imaging in a compact form factor, by exploiting the processing capability and speed of integrated CMOS electronics. Developments in SPAD imagers have recently made them compatible ...

2019

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