Publications related to Data-Retention-Time Characterization of Gain-Cell eDRAMs across the Design and Variations Space

Differential vector storage for dynamic random access memory

A storage device stores data in groups of memory cells using vectors corresponding to voltage code codewords, each codeword having k entries. Entries have values selected from a set of at least three entry values and 2.sup.n distinct inputs can be encoded ...

2016

Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Pascal Andreas Meinerzhagen

Logic compatible gain cell (GC) embedded DRAM (eDRAM) arrays are considered an alternative to SRAM due to their small size, non-ratioed operation, low static leakage, and 2-port functionality. However, traditional GC-eDRAM implementations require boosted c ...

Ieee-Inst Electrical Electronics Engineers Inc2016

Silicon-Proven, Per-Cell Retention Time Distribution Model for Gain-Cell Based eDRAMs

Andreas Peter Burg, Adam Shmuel Teman, Pascal Andreas Meinerzhagen

Gain-cell embedded DRAM (GC-eDRAM) is an interesting alternative to SRAMfor reasons such as high density, low bitcell leakage, logic compatibility, and suitability for 2-port memories. Themajor drawbacks of GC-eDRAMs are their limited data retention times ...

Institute of Electrical and Electronics Engineers2016

Effect of metal buffer layer and thermal annealing on HfOx-based ReRAMs

Elmira Shahrabi, Igor Krawczuk, Yusuf Leblebici, Jury Sandrini, Behnoush Attarimashalkoubeh

In this paper, we investigate different methods and approaches in order to improve the electrical characteristics of Pt/HfOx/TiN ReRAM devices. We discuss the improvement of the ReRAM electrical characteristics after the insertion of a Hf and Ti buffer lay ...

Ieee2016

Vertical versus lateral tunneling FET non-volatile memory cell

Mihai Adrian Ionescu, Saurabh Tomar, Arnab Biswas

This work reports a comparison of high-k AbO(3)/HfO2/Al2O3 dielectric stack Tunnel FETs with both vertical tunneling and lateral tunneling, as non-volatile memory (NVM) cells. Tunnel FET NVM are fabricated and characterized to evaluate their potential as l ...

IEEE2016

Inexact-Aware Architecture Design for Ultra-Low Power Bio-Signal Analysis

David Atienza Alonso, Giovanni Ansaloni, Pablo Garcia del Valle, Soumya Subhra Basu

This paper introduces an inexact, but ultra-low power, computing architecture devoted to the embedded analysis of bio-signals. The platform operates at extremely low voltage supply levels to minimize energy consumption. In this scenario, the reliability of ...

Inst Engineering Technology-Iet2016

A Process Compensated Gain Cell Embedded-DRAM for Ultra-Low-Power Variation-Aware Design

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Pascal Andreas Meinerzhagen

Gain cell embedded DRAM (GC-eDRAM) is a high-density alternative to SRAM for ultra-low-power systems. However, due to its dynamic nature, GC-eDRAM requires power-hungry refresh cycles to ensure data retention. Traditional design approaches dictate configur ...

Ieee2016

A Fully-Digital Spectrum Shaping Signaling for Serial-Data Transceiver with Crosstalk and ISI Reduction Property in Multi-Drop Memory Interfaces

Seyed Armin Tajalli, Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust

An efficient signaling scheme for serial-data transceivers (TRXs) has been proposed, which can properly reduce inter-symbol interference (ISI) and crosstalk (Xtalk) in memory interfaces. The proposed architecture relies on fully-digital implementation rath ...

Ieee2016

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Data-Retention-Time Characterization of Gain-Cell eDRAMs across the Design and Variations Space

Multilevel-cell phase-change memory

Differential vector storage for dynamic random access memory

Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications

Silicon-Proven, Per-Cell Retention Time Distribution Model for Gain-Cell Based eDRAMs

Effect of metal buffer layer and thermal annealing on HfOx-based ReRAMs

Vertical versus lateral tunneling FET non-volatile memory cell

Inexact-Aware Architecture Design for Ultra-Low Power Bio-Signal Analysis

A Process Compensated Gain Cell Embedded-DRAM for Ultra-Low-Power Variation-Aware Design

A Fully-Digital Spectrum Shaping Signaling for Serial-Data Transceiver with Crosstalk and ISI Reduction Property in Multi-Drop Memory Interfaces

Exploiting NVM in Large-scale Graph Analytics

Graph Chatbot

Chat with Graph Search

Inexact-Aware Architecture Design for Ultra-Low Power Bio-Signal Analysis

Effect of metal buffer layer and thermal annealing on HfOx-based ReRAMs

Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications

Differential vector storage for dynamic random access memory

A Process Compensated Gain Cell Embedded-DRAM for Ultra-Low-Power Variation-Aware Design

Vertical versus lateral tunneling FET non-volatile memory cell

Multilevel-cell phase-change memory

Silicon-Proven, Per-Cell Retention Time Distribution Model for Gain-Cell Based eDRAMs

A Fully-Digital Spectrum Shaping Signaling for Serial-Data Transceiver with Crosstalk and ISI Reduction Property in Multi-Drop Memory Interfaces

Exploiting NVM in Large-scale Graph Analytics