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An experimental demonstration of a set of optical logic gates (OR, XOR, AND) is shown using non-linear mixing in a BBO crystal. Pulses generated by a femtosecond Ti:Sapphire laser at 800 nm (140 fs duration, 2nJ/pulse) are split in 4 beams evenly separated ...
Spie-Int Soc Optical Engineering, Po Box 10, Bellingham, Wa 98227-0010 Usa1999
This paper presents a methodology for digitally calibrating analog circuits and systems. Based on the detection of an imperfection by a simple comparator, a successive approximations algorithm tunes a compensation current. The latter is generated by a sub- ...
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009
The paper describes a new motion detection circuit that extracts motion information based on a time-to-travel algorithm. The front-end photoreceptor adapts over 7 decades of background intensity and motion information can be extracted down to a contrast va ...
Today's world of electronics becomes more and more digital and therefore CMOS becomes the dominant technology. A CMOS process compared to a bipolar process offers several advantages, mainly a low power consumption which is important for portable systems po ...
The work introduces a mathematical framework and a corresponding implementable algorithm to automatically perform Volterra analysis of weakly nonlinear circuits. The analysis is based on the general composition rule for multivariate Volterra operators. The ...
It is quite difficult to construct circuits of spiking neurons that can carry out complex computational tasks. On the other hand even randomly connected circuits of spiking neurons can in principle be used for complex computational tasks such as time-warp ...
Using the Landauer-Büttiker formalism, we study ballistic transport properties of an interface between a ferromagnetic metal and a mesoscopic two-dimensional electron system in a III-V semiconductor. We show that in a Sharvin point contact spin-filtering o ...
The paper deals with the oscillator applications based on vibrating mode of the suspended gate SG-MOSFET transistor. In order to simulate the electrical behavior of the transistor a small-signal equivalent circuit of the gate is proposed and validated. An ...
High defect density exhibited by nanoelectronic technologies, and parameter variability already affecting the operation of very-deep submicron CMOS systems demand for a combination of specific solutions, focusing at each various levels of abstraction in th ...
Fault-tolerant design methods for VLSI circuits, which have traditionally been addressed at system level, will not be adequate for future very-deep submicron CMOS devices where serious degradation of reliability is expected. Therefore, a new design approac ...