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Programmable Logic Gates Based On Tunable Multistable Mechanisms

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We derive algorithms for efficient secure numerical and logical operations in the semi-honest model ensuring statistical or perfect security for secure multi-party computation (MPC). To derive our algorithms for trigonometric functions, we use basic mathem ...

Elsevier Science Bv2017

This paper demonstrates the feasibility of implementing real-time state estimators for active distribution networks in field-programmable gate arrays (FPGAs) by presenting an operational prototype. The prototype is based on a linear state estimator that us ...

Institute of Electrical and Electronics Engineers2017

NAND-NOR: A Compact, Fast, and Delay Balanced FPGA Logic Element

Paolo Ienne, Grace Zgheib, Yu Lin, Wei Li

The And-Inverter Cone has been introduced as an alternative logic element to the look-up table in FPGAs, since it improves their performance and resource utilization. However, further analysis of the AIC design showed that it suffers from the delay discrep ...

ACM2017

The Programmable Logic-in-Memory (PLiM) Computer (Invited)

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Anupam Chattopadhyay

Realization of logic and storage operations in memristive circuits have opened up a promising research direction of in-memory computing. Elementary digital circuits, e.g., Boolean arithmetic circuits, can be economically realized within memristive circuits ...

Ieee2016

Photon-Counting Arrays for Time-Resolved Imaging

Edoardo Charbon, Claudio Bruschini, Ivan Michel Antolovic, Samuel Burri

The paper presents a camera comprising 512 x 128 pixels capable of single-photon detection and gating with a maximum frame rate of 156 kfps. The photon capture is performed through a gated single-photon avalanche diode that generates a digital pulse upon p ...

MDPI2016

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The performance and the efficiency of recent computing platforms have been deeply influenced by the widespread adoption of hardware accelerators, such as Graphics Processing Units (GPUs) or Field Programmable Gate Arrays (FPGAs), which are often employed t ...

Assoc Computing Machinery2016

High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

The growing complexity of digital signal processing applications make a compelling case the use of high-level design and synthesis methodologies for the implementation on programmable logic devices and embedded processors. Past research has shown that, for ...

2016

Towards More Efficient Logic Blocks by Exploiting Biconditional Expansion

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Xifan Tang, Gain Kim

Nowadays, Field Programmable Gate Arrays (FPGA) exploit Look-Up Tables (LUTs) to generate logic functions. A K-input LUT can implement any Boolean functions with K inputs. Thanks to this flexibility, LUTs remained concep ...

2015

An open problem in polarization theory is to determine the binary operations that always lead to polarization when they are used in Arıkan style constructions. This paper solves this problem by providing a necessary and sufficient condition for a binary op ...

IEEE2015

Coarse Grain Clock Gating Of Streaming Applications In Programmable Logic Implementations

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

Streaming applications describe a broad class of computing algorithms in areas such as signal processing, media coding and compression, cryptography, video analytics, network touting and packet processing and many others. For many of these applications, pr ...

Ieee2014