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Cryogenic MOSFET Modeling for Large-Scale Quantum Computing

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Cryogenic MOSFET Modeling for Large-Scale Quantum Computing

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Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures

Voltage References for the Ultra-Wide Temperature Range from 4.2 K to 300 K in 40-nm CMOS

Cryogenic MOSFET Threshold Voltage Model

Design-oriented Modeling of 28 nm FDSOI CMOS Technology down to 4.2 K for Quantum Computing

Characterization and Modeling of 28 nm Bulk CMOS Technology down to Cryogenic Temperatures (4.2 K)

Performance characterization of Altera and Xilinx 28 nm FPGAs at cryogenic temperatures

Steep Slope Transistors for Quantum Computing

A Timing-Monitoring Sequential for Forward and Backward Error-Detection in 28 nm FD-SOI

A back-illuminated 3D-stacked single-photon avalanche diode in 45nm CMOS technology, 2017 IEEE International Electron Devices Meeting (IEDM)