Publication

SOI mixed-mode design techniques and case studies

Related publications (97)

About
Privacy
Disclaimer

Graph Chatbot

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

SOI mixed-mode design techniques and case studies

Graph Chatbot

Chat with Graph Search

Design of High-Temperature SRAM for Reliable Operation Beyond 250 C

Heterogeneous Integration of ReRAM Crossbars in 180nm CMOS BEoL Process

Low-Voltage Read/Write Circuit Design for Transistorless ReRAM Crossbar Arrays in 180nm CMOS Technology

1T Capacitor-less DRAM cell based on asymmetric Tunnel FET design

Design of Digital SoC for Operation at High Temperatures

Temperature-Aware Runtime Power Management for Chip-Multiprocessors with 3-D Stacked Cache

Single event upset mitigation in low power SRAM design

Investigation of Tunnel Field-Effect Transistors as a Capacitor-less Memory Cell

A 90GS/s 8b 667mW 64x Interleaved SAR ADC in 32nm Digital SOI CMOS

4T Gain-Cell with internal-feedback for ultra-low retention power at scaled CMOS nodes