Semiconductor device fabricationSemiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as computer processors, microcontrollers, and memory chips (such as NAND flash and DRAM) that are present in everyday electrical and electronic devices. It is a multiple-step photolithographic and physio-chemical process (with steps such as thermal oxidation, thin-film deposition, ion-implantation, etching) during which electronic circuits are gradually created on a wafer, typically made of pure single-crystal semiconducting material.
Multi-project wafer serviceMulti-project chip (MPC), and multi-project wafer (MPW) semiconductor manufacturing arrangements allow customers to share mask and microelectronics wafer fabrication cost between several designs or projects. With the MPC arrangement, one chip is a combination of several designs and this combined chip is then repeated all over the wafer during the manufacturing. MPC arrangement produces typically roughly equal number of chip designs per wafer.
Wafer (electronics)In electronics, a wafer (also called a slice or substrate) is a thin slice of semiconductor, such as a crystalline silicon (c-Si), used for the fabrication of integrated circuits and, in photovoltaics, to manufacture solar cells. The wafer serves as the substrate for microelectronic devices built in and upon the wafer. It undergoes many microfabrication processes, such as doping, ion implantation, etching, thin-film deposition of various materials, and photolithographic patterning.
Very Large Scale IntegrationVery large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining millions or billions of MOS transistors onto a single chip. VLSI began in the 1970s when MOS integrated circuit (Metal Oxide Semiconductor) chips were developed and then widely adopted, enabling complex semiconductor and telecommunication technologies. The microprocessor and memory chips are VLSI devices. Before the introduction of VLSI technology, most ICs had a limited set of functions they could perform.
Graphene nanoribbonGraphene nanoribbons (GNRs, also called nano-graphene ribbons or nano-graphite ribbons) are strips of graphene with width less than 100 nm. Graphene ribbons were introduced as a theoretical model by Mitsutaka Fujita and coauthors to examine the edge and nanoscale size effect in graphene. Large quantities of width-controlled GNRs can be produced via graphite nanotomy, where applying a sharp diamond knife on graphite produces graphite nanoblocks, which can then be exfoliated to produce GNRs as shown by Vikas Berry.
NanotechnologyNanotechnology, often shortened to nanotech, is the use of matter on atomic, molecular, and supramolecular scales for industrial purposes. The earliest, widespread description of nanotechnology referred to the particular technological goal of precisely manipulating atoms and molecules for fabrication of macroscale products, also now referred to as molecular nanotechnology. A more generalized description of nanotechnology was subsequently established by the National Nanotechnology Initiative, which defined nanotechnology as the manipulation of matter with at least one dimension sized from 1 to 100 nanometers (nm).
GrapheneGraphene (ˈgræfiːn) is an allotrope of carbon consisting of a single layer of atoms arranged in a hexagonal lattice nanostructure. The name is derived from "graphite" and the suffix -ene, reflecting the fact that the graphite allotrope of carbon contains numerous double bonds. Each atom in a graphene sheet is connected to its three nearest neighbors by σ-bonds and a delocalised π-bond, which contributes to a valence band that extends over the whole sheet.
NanolithographyNanolithography (NL) is a growing field of techniques within nanotechnology dealing with the engineering (patterning e.g. etching, depositing, writing, printing etc) of nanometer-scale structures on various materials. The modern term reflects on a design of structures built in range of 10−9 to 10−6 meters, i.e. nanometer scale. Essentially, the field is a derivative of lithography, only covering very small structures. All NL methods can be categorized into four groups: photo lithography, scanning lithography, soft lithography and other miscellaneous techniques.
Electron-beam lithographyElectron-beam lithography (often abbreviated as e-beam lithography, EBL) is the practice of scanning a focused beam of electrons to draw custom shapes on a surface covered with an electron-sensitive film called a resist (exposing). The electron beam changes the solubility of the resist, enabling selective removal of either the exposed or non-exposed regions of the resist by immersing it in a solvent (developing). The purpose, as with photolithography, is to create very small structures in the resist that can subsequently be transferred to the substrate material, often by etching.
SuperlensA superlens, or super lens, is a lens which uses metamaterials to go beyond the diffraction limit. The diffraction limit is a feature of conventional lenses and microscopes that limits the fineness of their resolution depending on the illumination wavelength and the numerical aperture NA of the objective lens. Many lens designs have been proposed that go beyond the diffraction limit in some way, but constraints and obstacles face each of them. In 1873 Ernst Abbe reported that conventional lenses are incapable of capturing some fine details of any given image.
