Publication

Mobility Extraction Assessment in GAA Si NW JL FETs with Cross-Section Down to 5 nm

Related publications (32)

Active Voltage Balancing with Seamless Integration into Dual Gate Driver for Series Connection of SiC MOSFETs

The versatility of half-bridge configuration of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) power module contributes to its widespread adoption, highlighting the popularity and significance of its corresponding dual gat ...

2024

Strain relaxation and multidentate anchoring in n-type perovskite transistors and logic circuits

Mohammad Khaja Nazeeruddin, Olga Syzgantseva

The engineering of tin halide perovskites has led to the development of p-type transistors with field-effect mobilities of over 70 cm2 V-1 s-1. However, due to their background hole doping, these perovskites are not suitable for n-type transistors. Ambipol ...

Nature Portfolio2024

Doping Engineering for PDP Optimization in SPADs Implemented in 55-nm BCD Process

Edoardo Charbon, Claudio Bruschini, Myung Jae Lee, Feng Liu

We introduce a new family of single-photon avalanche diodes (SPADs) with enhanced depletion regions in a 55-nm Bipolar-CMOS-DMOS (BCD) technology. We demonstrate how to systematically engineer doping profiles in the main junction and in deep p-well layers ...

Ieee-Inst Electrical Electronics Engineers Inc2024

A Dual-Channel Gate Driver Design with Active Voltage Balancing Circuit for Series Connection of SiC MOSFETs

Drazen Dujic

Dual-channel gate driver is commonly utilized in the industry for accommodating the widespread use of half-bridge power modules. As wide-bandgap devices become increasingly prevalent due to their superior switching characteristics compared with conventiona ...

2024

Towards Scalable Electronics: Synthetic 2D Materials for Large-Area 2D Circuit Integration

Zhenyu Wang

In the past decades, a significant increase of the transistor density on a chip has led to exponential growth in computational power driven by Moore's law. To overcome the bottleneck of traditional von-Neumann architecture in computational efficiency, effo ...

EPFL2024

Silicon CMOS and InGaAs(P)/InP SPADs for NIR/SWIR detection

Utku Karaca

Applications demanding imaging at low-light conditions at near-infrared (NIR) and short-wave infrared (SWIR) wavelengths, such as quantum information science, biophotonics, space imaging, and light detection and ranging (LiDAR), have accelerated the develo ...

EPFL2024

Measuring electrical properties in semiconductor devices by pixelated STEM and off-axis electron holography (or convergent beams vs. plane waves)

Victor Carle Adrien Boureau

We demonstrate the use of both pixelated differential phase contrast (DPC) scanning transmission electron microscopy (STEM) and off-axis electron holography (EH) for the measurement of electric fields and assess the advantages and limitations of each techn ...

Pergamon-Elsevier Science Ltd2024

Light-Intensity Switching of Graphene/WSe2 Synaptic Devices

Giulia Tagliabue, Tarique Anwar, Hongyu Tang

2D van der Waals heterojunctions (vdWH) have emerged as an attractive platform for the realization of optoelectronic synaptic devices, which are critical for energy-efficient computing systems. Photogating induced by charge traps at the interfaces indeed r ...

Wiley2024

Composition and Element Distribution Mapping of γ′ and γ" Phases of Inconel 718 by High-Resolution Scanning Transmission Electron Microscopy and X-ray Energy-Dispersive Spectrometry

Philippe Buffat

The main strengthening mechanism for Inconel 718 (IN718), a Ni-based superalloy, is precipitation hardening by gamma ' and gamma '' particles. It is thus essential, for good alloy performance, that precipitates with the desired chemical composition have ad ...

MDPI2024

SPAD Developed in 55 nm Bipolar-CMOS-DMOS Technology Achieving Near 90% Peak PDP

Edoardo Charbon, Claudio Bruschini, Ekin Kizilkan, Pouyan Keshavarzian, Francesco Gramuglia, Won Yong Ha, Myung Jae Lee

We present a single-photon avalanche diode (SPAD) developed in 55 nm bipolar-CMOS-DMOS (BCD) technology, which achieves high photon detection probability (PDP) while its breakdown voltage is lower than 20 V. To enhance the PDP performance, the SPAD junctio ...

Ieee-Inst Electrical Electronics Engineers Inc2024