Concept

Subthreshold conduction

Publications associées (188)

Negative Capacitance as Universal Digital and Analog Performance Booster for Complementary MOS Transistors

Mihai Adrian Ionescu, Christian Enz, Igor Stolichnov, Farzan Jazaeri, Ali Saeidi

Boltzmann electron energy distribution poses a fundamental limit to lowering the energy dissipation of conventional MOS devices, a minimum increase of the gate voltage, i.e. 60 mV, is required for a 10-fold increase in drain-to-source current at 300 K. Neg ...

2019

Cryogenic MOSFET Threshold Voltage Model

Christian Enz, Farzan Jazaeri, Arnout Lodewijk M Beckers

This paper presents a physics-based model for the threshold voltage in bulk MOSFETs valid from room down to cryogenic temperature (4.2 K). The proposed model is derived from Poisson’s equation including bandgap widening, intrinsic carrier-density scaling, ...

IEEE2019

Near Hysteresis-Free Negative Capacitance InGaAs Tunnel FETs with Enhanced Digital and Analog Figures of Merit below VDD=400mV

Mihai Adrian Ionescu, Igor Stolichnov, Ali Saeidi, Hiroshi Iwai

We report the universal boosting impact of a true negative capacitance (NC) effect on digital and analog performances of Tunnel FETs (TFETs), mirrored for the first time in near hysteresis-free experiments and exploiting the S-shaped polarization character ...

2019

Co-integrated Subthermionic 2D/2D WSe2/SnSe2 Vertical Tunnel FET and WSe2 MOSFET on same flake: towards a 2D/2D vdW Dual-Transport Steep Slope FET

Mihai Adrian Ionescu, Matteo Cavalieri, Nicolò Oliva

In this work we report the fabrication, co-integration and resulting performance of 2D/2D van der Waals (vdW) Vertical p-type Tunnel FETs and p-MOSFETs in a WSe2/SnSe2 material system. We demonstrate the best ever reported combined performance in terms of ...

IEEE2019

High-performance nanowire-based E-mode Power GaN MOSHEMTs

Elison de Nazareth Matioli, Jun Ma, Luca Nela, Minghua Zhu

In this work, we demonstrate high-performance Enhancement-mode (E-mode) GaN Metal-Oxide-Semiconductor High Electron Mobility Transistors (MOS-HEMTs) on Si substrate achieved by a nanostructured gate region in combination with a large work-function gate met ...

IEEE2019

Impact of Fin Width on Tri-Gate GaN MOSHEMTs

Elison de Nazareth Matioli, Jun Ma, Luca Nela, Giovanni Santoruvo, Taifang Wang

In this paper, we present a detailed investigation of the impact of fin width (w(fin)) on tri-gate AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs). As w(fin) is reduced, the threshold voltage (V-TH) increases, which is due ...

2019

1200 V Multi-Channel Power Devices with 2.8 Ω•mm ON-Resistance

Elison de Nazareth Matioli, Jun Ma, Catherine Erine, Minghua Zhu, Kai Cheng

Here we report novel multi-channel AlGaN/GaN MOSHEMTs with high breakdown voltage (V BR ) and low ON-resistance (R ON ). The multi-channel structure was judiciously designed to yield a small sheet resistance (R s ) of 80 Ω/sq using only four 2DEG channels, ...

IEEE2019

1200 V Multi-Channel Power Devices with 2.8 Omega.mm ON-Resistance

Elison de Nazareth Matioli, Jun Ma, Catherine Erine, Minghua Zhu, Kai Cheng

Here we report novel multi-channel AlGaN/GaN MOSHEMTs with high breakdown voltage (V-BR) and low ON-resistance (R-ON). The multi-channel structure was judiciously designed to yield a small sheet resistance (R-s) of 80 Omega/sq using only four 2DEG channels ...

IEEE2019

Sub-Thermionic Scalable III-V Tunnel Field-Effect Transistors Integrated on Si (100)

Mihai Adrian Ionescu, Kirsten Emilie Moselund

We present scalable III-V heterojunction tunnel FETs fabricated using a Si CMOS-compatible FinFET process flow and integrated on Si (100) substrates. The tunneling junction is fabricated through self-aligned selective p(+) GaAsSb raised source epitaxial re ...

IEEE2019

Modeling of Total Ionizing Dose Degradation on 180-nm n-MOSFETs Using BSIM3

Nergiz Sahin Solmaz, Mustafa Berke Yelten, Sadik Ilik

This paper presents a modeling approach to simulate the impact of total ionizing dose (TID) degradation on low-power analog and mixed-signal circuits. The modeling approach has been performed on 180-nm n-type metal-oxide-semiconductor field-effect transist ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

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