Publications associées à Microprogrammation

Student Answer Forecasting: Transformer-Driven Answer Choice Prediction for Language Learning

Vinitra Swamy, Jibril Albachir Frej, Paola Mejia Domenzain, Luca Zunino, Tommaso Martorella, Elena Grazia Gado

Intelligent Tutoring Systems (ITS) enhance personalized learning by predicting student answers to provide immediate and customized instruction. However, recent research has primarily focused on the correctness of the answer rather than the student's perfor ...

2024

Tradeoffs in Low-Power Accelerators Design for Large-Scale Interferometers

David Atienza Alonso, Miguel Peon Quiros, Denisa-Andreea Constantinescu, Benoît Walter Denkinger

Large-scale scientific infrastructures like SKAO—the world’s largest radio observatory for the coming decades—are generating massive-scale data streams of multi-Tb/s to be processed using complex interferometry algorithms. Concretely, SKAO is expected to g ...

2023

Micro-architectural analysis of in-memory OLTP: Revisited

Anastasia Ailamaki, Danica Porobic, Utku Sirin

Micro-architectural behavior of traditional disk-based online transaction processing (OLTP) systems has been investigated extensively over the past couple of decades. Results show that traditional OLTP systems mostly under-utilize the available micro-archi ...

2021

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Giovanni De Micheli, Mathias Soeken, Eleonora Testa, Odysseas Zografos

Emerging technologies such as plasmonics and photonics are promising alternatives to CMOS for high throughput applications, thanks to their waveguide's low power consumption and high speed of computation. Besides these qualities, these novel technologies a ...

2020

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Giovanni De Micheli, Mathias Soeken, Eleonora Testa, Odysseas Zografos

IEEE2020

Fast Block Sequential Decoding of Polar Codes

Kirill Ivanov

A reduced complexity sequential decoding algorithm for polar (sub) codes is described. The proposed approach relies on a decomposition of the polar (sub) code being decoded into a number of outer codes, and on-demand construction of codewords of these code ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Ultralong, complexly structured micro- and nanoscale metallic glasses and fibers

Grégoire Courtine, Fabien Sorin, Wei Yan, Inès Richard

The present invention and its embodiments propose a simple, unique, and scalable method for producing extremely long, highly uniform, and well-ordered micro- and nanoscale metallic glasses via thermal drawing the method comprising at least the steps of pre ...

2020

Computer Algebraic Approach to Verification and Debugging of Galois Field Multipliers

Cunxi Yu, Maciej Jerzy Ciesielski

The paper presents a novel method to verify and debug gate-level arithmetic circuits implemented in Galois Field arithmetic. The method is based on forward reduction of the specification polynomials of the circuit in GF(2(m)) using GF(2) models of its logi ...

IEEE2018

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Microprogrammation

Student Answer Forecasting: Transformer-Driven Answer Choice Prediction for Language Learning

Tradeoffs in Low-Power Accelerators Design for Large-Scale Interferometers

Micro-architectural analysis of in-memory OLTP: Revisited

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Sweat monitoring with CMOS compatible technology: ISFETS and beyond

Fast Block Sequential Decoding of Polar Codes

Ultralong, complexly structured micro- and nanoscale metallic glasses and fibers

Design of approximate and precision-scalable circuits for embedded multimedia and neural-network processing

Computer Algebraic Approach to Verification and Debugging of Galois Field Multipliers

Graph Chatbot

Chattez avec Graph Search

Student Answer Forecasting: Transformer-Driven Answer Choice Prediction for Language Learning

Micro-architectural analysis of in-memory OLTP: Revisited

Tradeoffs in Low-Power Accelerators Design for Large-Scale Interferometers

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Sweat monitoring with CMOS compatible technology: ISFETS and beyond

Fast Block Sequential Decoding of Polar Codes

Design of approximate and precision-scalable circuits for embedded multimedia and neural-network processing

Ultralong, complexly structured micro- and nanoscale metallic glasses and fibers

Computer Algebraic Approach to Verification and Debugging of Galois Field Multipliers