Publications associées à PowerPC

Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical Devices

A programmable patient-customized epileptic seizure detector is proposed in this paper to enable neurologists and patients to have constructive interactions with the implantable medical device. The programmability feature is enabled by designing a low-powe ...

IEEE2023

RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

Mirjana Stojilovic, Ognjen Glamocanin, David Spielmann

State-of-the-art sensors for measuring FPGA voltage fluctuations are time-to-digital converters (TDCs). They allow detecting voltage fluctuations in the order of a few nanoseconds. The key building component of a TDC is a delay line, typically implemented ...

2023

Comparison of Two in Pixel Source Follower Schemes for Deep Subelectron Noise CMOS Image Sensors

Christian Enz, Assim Boukhayma, Antonino Caizzone, Andrea Kraxner, Minhao Yang, Daniel Mathias Bold

This paper compares two in-pixel source follower stage designs for low noise CMOS image sensors embedded both on a same 5 mm by 5 mm chip fabricated in a 180 nm CIS process. The presented chip embeds two pixel variants, one based on a body-effect-canceled ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

WR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices

David Atienza Alonso, Miguel Peon Quiros, Benoît Walter Denkinger

Edge-computing requires high-performance energy-efficient embedded systems. Fixed-function or custom accelerators, such as FFT or FIR filter engines, are very efficient at implementing a particular functionality for a given set of constraints. However, the ...

2022

Closing Leaks: Routing Against Crosstalk Side-Channel Attacks

Mirjana Stojilovic, Seyedeh Sharareh Mirzargar, Zeinab Seifoori

This paper presents an extension to PathFinder FPGA routing algorithm, which enables it to deliver FPGA designs free from risks of crosstalk attacks. Crosstalk side-channel attacks are a real threat in large designs assembled from various IPs, where some I ...

2020

Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs Across the Design and Variations Space

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Andrea Bonetti

The rise of data-intensive applications has resulted in an increasing demand for high-density and low-power on-chip embedded memories. Gain-cell embedded DRAM (GC-eDRAM) is a logic-compatible alternative to conventional static random access memory (SRAM) w ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC

Andreas Peter Burg, David Ruffieux

In this paper, we describe a systematic low-power design methodology for technologies that offer a strong body factor. Specifically, we explore both the body bias voltage and the supply voltage knobs in order to find the MEP (minimum energy point) for a co ...

IEEE2019

Survey of Precision-Scalable Multiply-Accumulate Units for Neural-Network Processing

Christian Enz, Vincent Frédéric Camus

The current trend for deep learning has come with an enormous computational need for billions of Multiply-Accumulate (MAC) operations per inference. Fortunately, reduced precision has demonstrated large benefits with low impact on accuracy, paving the way ...

IEEE2019

High-Voltage Normally-off Recessed Tri-Gate GaN Power MOSFETs With Low on-Resistance

Elison de Nazareth Matioli, Jun Ma, Luca Nela, Catherine Erine, Minghua Zhu

In this letter, we present normally-off GaN-on-Si MOSFETs based on the combination of tri-gate with a short barrier recess to yield a large positive threshold voltage (VTH) while maintaining a low specific on resistance (R ON,SP ) and high current density ...

2019

Chattez avec Graph Search

Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.

AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.

PowerPC

EdgeAI-Aware Design of In-Memory Computing Architectures

Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical Devices

RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

Comparison of Two in Pixel Source Follower Schemes for Deep Subelectron Noise CMOS Image Sensors

WR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices

Closing Leaks: Routing Against Crosstalk Side-Channel Attacks

Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs Across the Design and Variations Space

Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC

Survey of Precision-Scalable Multiply-Accumulate Units for Neural-Network Processing

High-Voltage Normally-off Recessed Tri-Gate GaN Power MOSFETs With Low on-Resistance

Graph Chatbot

Chattez avec Graph Search

Comparison of Two in Pixel Source Follower Schemes for Deep Subelectron Noise CMOS Image Sensors

EdgeAI-Aware Design of In-Memory Computing Architectures

WR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices

High-Voltage Normally-off Recessed Tri-Gate GaN Power MOSFETs With Low on-Resistance

Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical Devices

RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

Closing Leaks: Routing Against Crosstalk Side-Channel Attacks

Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs Across the Design and Variations Space

Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC

Survey of Precision-Scalable Multiply-Accumulate Units for Neural-Network Processing