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Publications associées (28)

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Stretch: Balancing QoS and Throughput for Colocated Server Workloads on SMT Cores

Boris Robert Grot, Siddharth Gupta

In a drive to maximize resource utilization, today's datacenters are moving to colocation of latency-sensitive and batch workloads on the same server. State-of-the-art deployments, such as those at Google, colocate such diverse workloads even on a single S ...

IEEE2019

High Speed SAR ADC Architectures in 28nm FDSOI CMOS

Mustafa Kilic

The demand on high speed Analog to Digital Converters (ADCs) has increased considerably the last years. From communications circuit to high speed oscilloscopes, Giga Samples per second (GS/s) ADCs are requested. With the scaling of the CMOS technology, des ...

EPFL2019

FPGA-Assisted Deterministic Routing for FPGAs

Mirjana Stojilovic, Dario Korolija

FPGA routing is one of the most time-consuming steps of FPGA compilation, often preventing fast edit-compile-test cycles in prototyping and development. There have been attempts to accelerate FPGA routing using algorithmic improvements, multi-core or multi ...

2019

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

Mihai Adrian Ionescu, Cem Alper, Arnab Biswas, Florin Udrea

This paper reports a compact ambipolar model for homojunction strained-silicon (sSi) nanowire (NW) tunnel FETs (TFETs) capable of accurately describing both I-V and G-V characteristics in all regimes of operation, n- and p-ambipolarity, the superlinear ons ...

Institute of Electrical and Electronics Engineers2017

Leading the Blind : Automated Transistor-Level Modeling for FPGA Architects

Grace Zgheib

The design and development of innovative FPGA architectures hinge on the flexibility of its toolchain. Retargetable toolchains, like the Verilog-to-Routing (VTR) flow, have been developed to enable the testing of new FPGAs by mapping circuits onto easily-d ...

EPFL2017

An Insect Eye Inspired Miniaturized Multi-Camera System for Endoscopic Imaging

Yusuf Leblebici, Ömer Cogal

In thiswork,we present aminiaturized high definition vision system inspired by insect eyes, with a distributed illumination method, which can work in dark environments for proximity imaging applications such as endoscopy. Our approach is based on modeling ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Easy and Accurate Hardware-based Program Performance Monitoring

Andrzej Pawel Nowak

The performance monitoring of computer systems is a complex affair, made even more challenging by the increasing gap between hardware and software. Methods that collect and feed data to performance analysis can usually be classified into one of two groups. ...

EPFL2017

A High-PDE, Backside-Illuminated SPAD in 65/40-nm 3D IC CMOS Pixel With Cascoded Passive Quenching and Active Recharge

Edoardo Charbon, Scott Anthony Lindner, Martin Wolf

We present a complete pixel based on a single-photon avalanche diode (SPAD) fabricated in a backside-illuminated (BSI) 3D IC technology. The chip stack comprises an image sensing tier produced in a 65-nm image sensor technology and a data processing tier i ...

Institute of Electrical and Electronics Engineers2017

Microarchitectural Low-Power Design Techniques for Embedded Microprocessors

Jeremy Hugues-Felix Constantin

With the omnipresence of embedded processing in all forms of electronics today, there is a strong trend towards wireless, battery-powered, portable embedded systems which have to operate under stringent energy constraints. Consequently, low power consumpti ...

EPFL2016

Avalanche Microwave Noise Sources in Commercial 90-nm CMOS Technology

Christian Enz, Pierre-André Farine, Cyril Botteron, Gabriele Tasselli

This paper presents a microwave noise source implemented in a commercial CMOS technology. The circuit is based on the avalanche noise generated by both the source-to-bulk and the drain-to-bulk junctions in reverse breakdown. Two sources of different juncti ...

Institute of Electrical and Electronics Engineers2016

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