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Multiplexeur

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Resource Sharing in Dataflow Circuits

Resource Sharing in Dataflow Circuits

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Swap and Rotate: Lightweight Linear Layers for SPN-based Blockciphers

Toward a Full-Flexible and Fast-Prototyping TOF-PET Block Detector Based on TDC-on-FPGA

A programmable low-power ADC interface for an ISFET sweat sensor used in a wearable multi-sensing system

LUT-Based Hierarchical Reversible Logic Synthesis

Optimization Opportunities in RRAM-based FPGA Architectures

Physical Design Considerations of One-level RRAM-based Routing Multiplexers

Pattern-based fpga logic block and clustering algorithm

Resource Sharing in Dataflow Circuits

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Swap and Rotate: Lightweight Linear Layers for SPN-based Blockciphers

A programmable low-power ADC interface for an ISFET sweat sensor used in a wearable multi-sensing system

Optimization Opportunities in RRAM-based FPGA Architectures

Physical Design Considerations of One-level RRAM-based Routing Multiplexers

Pattern-based fpga logic block and clustering algorithm

Resource Sharing in Dataflow Circuits

LUT-Based Hierarchical Reversible Logic Synthesis

Toward a Full-Flexible and Fast-Prototyping TOF-PET Block Detector Based on TDC-on-FPGA